Backside Source/Drain Contacts With Insulating Fins for Lower Resistance

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Solution Overview

Problem

As semiconductor devices continue to shrink in feature size, they face challenges such as increased device resistance due to the limitations of backside source/drain contact areas and the need for improved electrical performance in nano-FETs and other transistor types.

Innovation Solution

The implementation of backside source/drain contacts with insulating fins to control source/drain profiles and separate adjacent regions, allowing for merged epitaxial source/drain regions that reduce device resistance without increasing contact area, combined with optimized interconnect structures for improved electrical performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If backside source/drain contact area is increased to reduce device resistance, then electrical performance is improved, but device area is increased

Engineering Contradiction:

Improveelectrical performanceVSAvoiddevice area

Core Design Contradiction:

ReliabilityVSArea of stationary object

Solution Approach 1:

The patent transitions from planar contact geometry to three-dimensional vertical contacts extending into the substrate. Backside contacts are formed at the rear surface of the substrate and extend vertically through or into the substrate thickness, utilizing the third dimension (depth) to increase contact area without expanding the planar footprint on the front surface.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The backside source/drain contacts are nested within or alongside the epitaxial source/drain regions. The contacts extend through the substrate and are positioned to make electrical connection with the epitaxial regions formed on the front surface, creating a nested configuration where the contact structure is integrated within the overall device architecture.

Inventive Principle:

Principle #7Nested doll (Nesting)

2Manufacturing precision

If insulating fins are added to control source/drain profiles, then manufacturing precision is improved, but device complexity is increased

Engineering Contradiction:

Improvesource/drain profile controlVSAvoiddevice complexity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

Insulating fins are introduced as intermediary structures positioned between adjacent source and drain regions. These fins act as mediators that define and control the boundaries of the source/drain regions during epitaxial growth, ensuring precise profile control while maintaining a relatively simple overall device structure.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The insulating fins segment the continuous substrate surface into distinct regions, creating separated zones for source and drain formation. This segmentation allows independent control of source and drain profiles while maintaining clear spatial boundaries between adjacent regions.

Inventive Principle:

Principle #1Segmentation

Data Source

PatentUS20240379781A1Backside Source/Drain Contacts and Methods of Forming the Same

Publication Date: 2024.11.14 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device, includes a device layer comprising: a channel region; a gate stack over and along sidewalls of the channel region and a first insulating fin; and an epitaxial source/drain region adjacent the channel region, wherein the epitaxial source/drain region extends through the first insulating fin. The semiconductor device further includes a front-side interconnect structure on a first side of the device layer; and a backside interconnect structure on a second side of the device layer opposite the first side of the device layer. The backside interconnect structure comprises a backside source/drain contact that is electrically connected to the epitaxial source/drain region.