Backside Dual Dielectric Fill for Nanosheet Thermal Dissipation

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Solution Overview

Problem

Nanosheet technology faces challenges in scaling down due to device interference and difficulty in forming connections to a backside power network as devices become smaller and closer together.

Innovation Solution

A semiconductor device structure incorporating a backside dual dielectric comprising a backside interlayer dielectric (BILD) layer and a backside thermal dissipation dielectric, such as SiC or SiOC, to improve thermal dissipation and prevent shorting, with a multistage processing involving etching, dielectric material deposition, and conductive metal filling to form backside source/drain contacts and power rails.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If devices are scaled down and placed closer together, then device density and integration are improved, but device interference increases and connection formation becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoiddevice interference
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent transitions from planar device layout to three-dimensional nanosheet structures with vertical channel regions. This dimensional change allows devices to be stacked vertically rather than only placed laterally, increasing device density while maintaining adequate spacing between devices to reduce interference. The nanosheet structure with multiple channels per footprint area enables higher integration without the proportional increase in device interference that would occur with simple lateral scaling.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If devices are scaled down and placed closer together, then device density is improved, but forming connections to backside power network becomes more difficult

Engineering Contradiction:
Improvedevice densityVSAvoidconnection formation
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The patent segments the power network into frontside and backside components. The backside power network is formed with separate power rails and contact structures that are independently patterned and connected to the nanosheet devices through through-substrate vias. This segmentation allows the backside connection formation to be decoupled from the frontside device fabrication, enabling standardized connection processes even as device density increases and lateral spacing decreases.

Inventive Principle:
Principle #1Segmentation

3Temperature

If thermal dissipation is improved, then overheating is prevented, but device structure complexity increases

Engineering Contradiction:
Improvethermal dissipationVSAvoiddielectric structure
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent employs a dual-dielectric structure where a first dielectric material (e.g., silicon oxide or silicon nitride) provides electrical isolation, and a second dielectric material (e.g., aluminum nitride or diamond) with superior thermal conductivity is integrated to enhance heat dissipation. This composite dielectric approach allows the structure to simultaneously achieve both electrical insulation and improved thermal management without requiring completely new device architectures, thus limiting the increase in structural complexity.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances thermal dissipation and facilitates effective connection to the backside power network, addressing overheating and shorting issues in nanosheet devices.

Implementation Method 1

a backside thermal dissipation dielectric is in direct contact with a backside surface of the BILD layer. The backside thermal dissipation dielectric is comprised of a second dielectric material

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20260076185A1Backside dual dielectric fill for better thermal conductivity
Publication Date: 2026.03.12 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20260076185A1 patent drawing
  • US20260076185A1 patent drawing
  • US20260076185A1 patent drawing

AI summary

According to the embodiment of the present invention, a semiconductor device comprises a first nanodevice including a plurality of first transistors. The first nanodevice includes a first placeholder. A backside interlayer dielectric (BILD) layer is in direct contact with a first portion of sidewalls of the first placeholder. The BILD layer is comprised of a first dielectric material. A backside thermal dissipation dielectric is in direct contact with a backside surface of the BILD layer. The backside thermal dissipation dielectric is comprised of a second dielectric material.