Backside Epitaxial Source/Drain Contacts for Lower Resistance

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Solution Overview

Problem

Reduced contact area in high-density semiconductor devices leads to increased resistance and slower switching speeds, posing challenges in forming effective contacts to source and drain regions.

Innovation Solution

The implementation of backside epitaxial growth to expand the contact area by forming backside source or drain regions within recesses on the semiconductor device, which are more heavily doped than the frontside regions, thereby reducing contact resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If integrated circuits are scaled downward in size to increase density, then device density is improved, but contact area is reduced leading to increased resistance

Engineering Contradiction:
Improvedevice densityVSAvoidcontact resistance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent accesses the contact area from the backside of the device, utilizing the third dimension (vertical access) to overcome the limitation of reduced top-down contact area. By forming backside contacts through recesses and growing epitaxial regions upward, the invention creates additional contact pathways without increasing the planar footprint, thus maintaining high density while improving contact characteristics.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The backside contact structure is formed within recesses that are etched into the substrate, creating a nested configuration where the contact region is embedded within the device structure. The epitaxial growth occurs within these recesses and extends upward, nesting the contact formation process within the existing device architecture without requiring additional lateral space.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Productivity

If contact area is reduced to maintain high-density scaling, then device density is improved, but switching speed decreases due to increased resistance

Engineering Contradiction:
Improvedevice densityVSAvoidswitching speed
Core Design Contradiction:
ProductivityVSSpeed

Solution Approach 1:

By transitioning from a two-dimensional contact area constraint to a three-dimensional contact formation approach, the patent creates vertical contact pathways through backside access. This dimensional transition allows multiple contact points to be formed within the same planar footprint, reducing overall resistance while preserving the high-density layout that enables fast switching speeds.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If existing contact formation processes are used that only expose a portion of the structure, then manufacturing simplicity is maintained, but contact resistance increases

Engineering Contradiction:
Improvecontact formation processVSAvoidcontact resistance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

Instead of forming contacts by exposing the top surface of the structure, the patent inverts the approach by accessing and forming contacts from the backside of the substrate. This inversion allows the contact formation process to occur beneath the device structure, exposing larger contact areas without complicating the overall manufacturing flow, as the same epitaxial growth and etching techniques are used.

Inventive Principle:
Principle #13The other way round (Inversion)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The technique enhances contact area and reduces resistance, improving switching speeds and device yield by increasing the dopant concentration in backside regions.

Implementation Method 1

a backside source or drain region grown on a bottom surface of the first source or drain region

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20250220994A1Backside epitaxial growth for improved contact area
Publication Date: 2025.07.03 INTEL CORP
  • US20250220994A1 patent drawing
  • US20250220994A1 patent drawing
  • US20250220994A1 patent drawing

AI summary

Techniques are provided to form an integrated circuit having backside epaxially grown source or drain regions in addition to the frontside source or drain regions to reduce backside contact resistance. A semiconductor device includes a gate structure around or otherwise on a semiconductor region. The gate structure includes a gate dielectric and a gate electrode. The substrate beneath the semiconductor device may be removed from the backside to expose a subfin region beneath the semiconductor region. The subfin region may be removed using a backside etch to open a backside recess that exposes a bottom surface of a given frontside source or drain region. A backside source or drain region may be grown on a bottom surface of the given frontside source or drain region and remain within the backside recess or extend out of the backside recess.