Backside Film Deposition for Semiconductor Warpage and Overlay Control

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Solution Overview

Problem

Warpage in semiconductor devices due to mechanical property mismatches between layers leads to increased overlay errors during processing, which existing technologies fail to address effectively.

Innovation Solution

A method and tool for film deposition that involves holding a semiconductor device by a holding component, with a chamber defined by a showerhead and a pedestal, where reacting gases are provided from the bottom to form a dielectric layer directly on the backside surface in a single step, avoiding the need for a passivation layer on the active surface and minimizing warpage compensation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a passivation layer is deposited on the active surface to protect it during dielectric layer formation, then the active surface is protected from damage, but passivation layer remnants remain and cause overlay errors

Engineering Contradiction:
Improveactive surface protectionVSAvoidoverlay accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention extracts the protective function from the active surface by transferring it to the backside surface. A dielectric layer is formed on the backside surface instead of protecting the active surface with a passivation layer. This eliminates the source of passivation layer remnants that cause overlay errors while maintaining surface protection through the dielectric layer on the backside.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of protecting the active surface (front side) with a passivation layer, the invention inverts the approach by forming a dielectric layer on the backside surface. This reverse approach achieves warpage compensation and surface protection without compromising the active surface integrity, thereby eliminating overlay errors caused by passivation layer remnants.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If multiple steps are used to form dielectric layer on backside surface while protecting active surface, then complete protection is achieved, but process complexity and cost increase

Engineering Contradiction:
Improvesurface protectionVSAvoidprocess steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The invention extracts the protective function from the active surface and relocates it to the backside surface through dielectric layer formation. This single-step approach on the backside surface replaces multiple complex steps involving passivation layer deposition, pattern breaking, and removal, thereby simplifying the overall process while maintaining protection effectiveness.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention merges the protective function and warpage compensation function into a single dielectric layer formation step on the backside surface. This consolidation eliminates the need for separate passivation layer processes, reducing both process complexity and cost while achieving multiple objectives simultaneously.

Inventive Principle:
Principle #5Merging (Combining)

3Productivity

If dielectric layer is formed on backside surface in single step, then process time and cost are reduced, but warpage compensation effectiveness must be maintained

Engineering Contradiction:
ImprovethroughputVSAvoidwarpage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The invention controls warpage compensation by adjusting parameters of the dielectric layer such as thickness, material composition, and deposition conditions. By optimizing these parameters in a single formation step on the backside surface, the process achieves both high productivity and effective warpage control, maintaining manufacturing precision while reducing process time and cost.

Inventive Principle:
Principle #35Parameter changes

4Ease of operation

If passivation layer is removed after dielectric layer formation, then active surface is exposed for processing, but overlay errors increase due to remnants

Engineering Contradiction:
Improveactive surface accessibilityVSAvoidoverlay accuracy
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The invention extracts the protective function from the active surface and implements it on the backside surface instead. Since no passivation layer is formed on the active surface, there are no remnants to remove, eliminating overlay errors while maintaining full accessibility of the active surface for subsequent processing operations.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The invention converts the potential harm of passivation layer remnants into a benefit by completely avoiding passivation layer formation on the active surface. The dielectric layer on the backside surface provides the necessary protection and warpage compensation without creating any harmful remnants on the active surface, thereby improving overlay accuracy while maintaining ease of operation.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces costs, improves throughput, maintains the integrity of the active surface, and effectively compensates for warpage to a low extent (+/−1 μm), while preventing passivation layer remnants and damage, thereby enhancing overlay accuracy.

Implementation Method 1

providing reacting gases by the showerhead from a bottom side of the chamber, and forming a first dielectric layer on a backside surface of the semiconductor device

Methodology Applied
Scientific EffectChemical Vapor Deposition: Chemical Vapour Deposition

Data Source

PatentUS20240128078A1Method and tool for film deposition
Publication Date: 2024.04.18 NAN YA TECH
  • US20240128078A1 patent drawing
  • US20240128078A1 patent drawing
  • US20240128078A1 patent drawing

AI summary

A method and a tool for film deposition are provided. The method of film deposition includes holding a semiconductor device in a chamber by a holding component, wherein the chamber is defined by a showerhead and a pedestal, providing reacting gases by the showerhead from a bottom side of the chamber, and forming a first dielectric layer on a backside surface of the semiconductor device.