Backside Film Laser Annealing for Wafer Stress and Flatness Control
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Solution Overview
Problem
Wafer flatness issues during semiconductor device fabrication lead to potential die yield loss due to uneven stress distribution and shape variations, which existing backside deposition solutions cannot effectively address, especially in complex semiconductor structures like 3D memory devices.
Innovation Solution
A method involving the formation of a semiconductor film on the backside of a wafer with a laser anneal process in specific application regions to control stress distribution, where the laser application region is determined based on the shape variation and fabrication stage of the front-side semiconductor structure, and laser control parameters like power and time are adjusted to transform amorphous silicon into polysilicon, thereby improving wafer flatness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a semiconductor film is deposited on the backside of the wafer to control stress, then wafer flatness is improved, but the process complexity increases due to additional deposition and laser annealing steps
Solution Approach 1:
The patent changes the physical and chemical parameters of the semiconductor film through laser annealing. By controlling laser power, scanning speed, and number of passes, the film transforms from amorphous to polysilicon phase, altering its stress properties to achieve wafer flatness control without requiring complex multi-layer structures
Solution Approach 2:
The patent utilizes phase transition of silicon material from amorphous phase to polysilicon phase through laser annealing. This phase change fundamentally alters the material's crystalline structure and stress characteristics, enabling effective wafer flatness control while maintaining a relatively simple two-step process (deposition + laser annealing)
2Manufacturing precision
If laser annealing is performed on the semiconductor film to control stress distribution, then wafer flatness is improved, but energy consumption increases
Solution Approach 1:
The patent applies laser annealing selectively to specific regions of the semiconductor film based on the measured shape variation map of the wafer. By targeting only the regions that require stress adjustment rather than annealing the entire film, energy consumption is significantly reduced while still achieving the desired wafer flatness improvement
Solution Approach 2:
The system uses the wafer's own shape variation data to determine the laser annealing regions, allowing the process to self-adjust and optimize energy usage based on the actual wafer condition rather than applying a fixed, energy-intensive blanket annealing process
3Manufacturing precision
If individual wafer shape variation measurements are performed to customize stress control, then manufacturing precision is improved, but productivity decreases due to sequential processing
Solution Approach 1:
The patent performs shape variation measurements on all wafers in the batch before the laser annealing process. By obtaining the measurement data in advance and planning the laser annealing regions for multiple wafers beforehand, the system enables batch processing where multiple wafers can be treated in sequence or parallel without waiting for individual measurements, thus maintaining high precision while improving productivity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for precise control of wafer stress, improving flatness and reducing die yield loss by customizing stress control for each wafer, enabling efficient batch processing without the need for individual shape variation measurements.
Implementation Method 1
A laser anneal process is performed in the laser application region of the semiconductor film
Implementation Method 2
transform amorphous silicon into polysilicon
Implementation Method 3
The wafer is deformed by stress associated with a front-side semiconductor structure on a front side of the wafer
Data Source
AI summary
In certain aspects, a method for controlling wafer stress is disclosed. A semiconductor film is formed on a backside of a wafer. The wafer is deformed by stress associated with a front-side semiconductor structure on a front side of the wafer opposite to the backside of the wafer. A laser application region of the semiconductor film is determined. A laser anneal process is performed in the laser application region of the semiconductor film.