Backside Gate Connector Layout for Front-Side Wiring Congestion
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Solution Overview
Problem
In semiconductor devices, there is limited space for connecting nearby gates to middle-of-line (MOL) wiring due to the presence of source/drain contacts between them, leading to congestion and reduced space for additional front-side wiring.
Innovation Solution
A backside gate connector is introduced, formed below the semiconductor devices, which connects two or more gates to front-side interconnect wiring through a single gate contact, allowing for additional wiring space on the front side by utilizing backside metallization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If source/drain contacts are placed between nearby gates to connect to MOL wiring, then gate connectivity is achieved, but front-side wiring space is reduced and congestion increases
Solution Approach 1:
The patent introduces a backside gate connector that extends from the front side through the substrate to the back side, utilizing the third dimension (depth/substrate thickness) to resolve the spatial conflict. This allows gate connections to be made on the back side, freeing up front-side wiring space while maintaining gate connectivity through the substrate.
Solution Approach 2:
The backside gate connector acts as an intermediary element that mediates between the gates on the front side and the MOL wiring. By introducing this connector that passes through the substrate, the patent enables gate connections without requiring source/drain contacts to occupy valuable front-side wiring space.
2Reliability
If multiple gate contacts are used to connect nearby gates to front-side wiring, then gate connectivity is ensured, but device cell size increases
Solution Approach 1:
By moving the gate connection point to the back side of the substrate, the patent eliminates the need for multiple front-side gate contacts. The single backside gate connector serves multiple gates simultaneously, reducing the device cell area while maintaining reliable gate connectivity through the substrate.
Solution Approach 2:
The backside gate connector merges multiple gate connections into a single structure on the back side. Instead of requiring separate gate contacts for each gate on the front side, the patent combines these connections through a unified backside connector, reducing overall device cell size.
3Adaptability or versatility
If front-side interconnect wiring is densely routed to connect gates, then device functionality is achieved, but wiring congestion increases
Solution Approach 1:
The patent resolves wiring congestion by utilizing the back side of the substrate as an additional dimension for routing. The backside gate connector provides an alternative path for gate connections, reducing the density and complexity of front-side interconnect wiring while maintaining full device functionality.
Solution Approach 2:
The patent extracts the gate connection function from the congested front-side wiring layer and relocates it to the back side of the substrate. This separation removes the source of wiring congestion from the front side, simplifying the interconnect architecture while preserving device functionality.
Data Source
AI summary
A semiconductor structure including a backside gate connector formed in a backside metal layer of the semiconductor structure. The backside gate connector directly contacts the bottom surface of two or more two gates where only a single gate contact connects one of the two or more gates to a layer of the front side interconnect wiring above the two or more gates. At least one source/drain residing between the two or more gates has a source/drain contact connecting a layer of the front side interconnect wiring. The backside gate connector connecting two or more gates resides below the two or more gates and any source/drains that are between the two or more gates.