Backside Illumination CMOS Image Sensor Wafer Bonding
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Solution Overview
Problem
Conventional 3D integration CMOS image sensors face issues with reduced photosensitivity due to light diffusion and refraction at interfaces between different insulating layers and metal wiring lines, leading to increased noise and decreased image quality.
Innovation Solution
The image sensor employs a backside illumination structure with photo diodes and transfer gate transistors formed in a first wafer, and signal processing transistors and wiring lines formed on a second wafer, which is bonded after hydrogen ion implantation and smart-cutting, with the filter unit positioned below the photo diodes to maximize light saturation and minimize diffraction.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If metal wiring lines and transparent insulating layers are formed after photo diode fabrication, then signal processing and control functions are achieved, but light diffusion and refraction occur at interfaces reducing photosensitivity
Solution Approach 1:
The patent divides the image sensor into separate functional modules: a first wafer containing photo diodes and transfer gate transistors, and a second wafer containing signal processing transistors and wiring lines. These modules are fabricated independently and then bonded together, allowing each module to be optimized separately without interference from the other components.
Solution Approach 2:
The patent transitions from a planar integration approach to a three-dimensional stacked architecture. By stacking the photo diode wafer and signal processing wafer vertically and bonding them together, the patent enables signal processing functions while maintaining optical path clarity, as the wiring lines are confined to the second wafer and do not interfere with light incident on the photo diodes in the first wafer.
2Ease of operation
If multiple transistors are arranged around the photo diode for signal processing, then control functions are achieved, but the surface area for receiving light is reduced
Solution Approach 1:
The patent separates control transistors from the photo diode array by placing them on a different wafer (second wafer). This segmentation allows the photo diodes to occupy the entire surface area of the first wafer for light reception, while control transistors are fabricated on the second wafer and connected through vertical wiring, eliminating the need to arrange transistors around each photo diode.
Solution Approach 2:
The patent moves control transistors from the two-dimensional plane around the photo diode to a third-dimensional stacked configuration. By placing control transistors on the second wafer beneath the photo diode array, the patent maximizes the light-receiving surface area of the first wafer while maintaining full control functionality through vertical interconnections.
3Device complexity
If conventional 3D integration method is used, then module integration is achieved, but noise increases and image quality deteriorates due to reduced light saturation
Solution Approach 1:
The patent segments the image sensor into optically sensitive and electronically processed regions on separate wafers. The first wafer is dedicated entirely to photo diodes with no surrounding transistors or wiring, ensuring maximum light saturation and minimal noise. The second wafer contains all signal processing transistors and wiring lines, which are connected to the photo diodes through controlled vertical interconnections, thereby isolating noise sources from the optical detection region.
Solution Approach 2:
The patent employs a stacked three-dimensional architecture where the first wafer with photo diodes is bonded to the second wafer with signal processing circuits. This vertical stacking enables full integration of modules while preserving the optical performance of the photo diodes, as the wiring and transistors are confined to the second wafer and do not obstruct or degrade the light-receiving capability of the first wafer.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances photosensitivity by eliminating the negative effects of metal wiring lines and allows for increased saturation of the light-receiving region, reducing noise and improving image quality.
Implementation Method 1
The second wafer may be implanted with hydrogen ions, and the wiring line unit may include the transistors, for signal processing and controlling, formed on a region that is remained after a predetermined portion of the second wafer is removed by smart-cutting.
Implementation Method 2
The second wafer may be bonded to the photo diode unit by being closely stacked and annealing.
Data Source
AI summary
An image sensor having a backside illumination structure can include a photo diode unit in a first wafer, where the photo diode unit includes photo diodes and transfer gate transistors coupled to respective ones of the photo diodes. A wiring line unit can be included on a second wafer that is bonded to the photo diode unit, where the wiring line unit includes wiring lines and transistors configured to process signals provided by the photo diode unit and configured to control the photo diode unit. A supporting substrate is bonded to the wiring line unit and a filter unit is located under the first wafer.