Backside Integrated Capacitor Design for Low Resistance
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Solution Overview
Problem
Existing semiconductor capacitor technologies face challenges in reducing electrical connection distances and resistances, increasing integration density, and minimizing leakage current losses and polarization, while also aiming to enhance developed surface areas.
Innovation Solution
The semiconductor device features a substrate wafer with capacitors formed as columns protruding into a back hole, comprising an inner electrically conducting layer, an outer electrically conducting layer, and an intermediate dielectric layer, along with a front dielectric layer and a conducting back layer for connections, and a method for fabricating these devices involving the formation of blind holes, dielectric and conducting layers, and passivation layers to optimize electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If capacitors are formed on the front face of the substrate with electrodes extending into the substrate, then the capacitor structure is established, but the electrical connection distances and resistances are increased
Solution Approach 1:
The patent inverts the conventional capacitor formation approach by moving capacitors from the front face to the back face of the substrate. The back side of the substrate is flattened and used to form capacitor electrodes, which are then connected to front-side circuits through vertical conductive vias. This inversion reduces electrical connection distances and resistances while improving integration density.
2Productivity
If integration density is increased, then more capacitors can be accommodated, but the developed surface area of each capacitor may be reduced
Solution Approach 1:
The patent transitions from two-dimensional surface-mounted capacitors to three-dimensional vertically-integrated capacitors. By forming capacitors on the back face and connecting them through vertical vias to the front face, the design utilizes the third dimension (depth/vertical direction) to accommodate capacitor structures without consuming additional lateral surface area on the front face, thereby maintaining high integration density while preserving adequate capacitor surface area.
3Reliability
If capacitor electrodes are extended into the substrate, then the capacitor structure is formed, but leakage current losses and polarization are increased
Solution Approach 1:
The patent extracts the capacitor formation process from the front-side substrate region and relocates it to the back-side flattened surface. By separating capacitor electrode formation from the active front-side circuit region and using the back surface as the capacitor formation plane, the design reduces leakage current paths and polarization effects while maintaining reliable capacitor performance.
Data Source
AI summary
A semiconductor device includes a substrate wafer and having a front face and a back face. A front hole is formed in the front face and a multilayer capacitor is formed in the front hole. A back hole is formed in the back face of the substrate wafer to expose at least a portion of the multilayer capacitor. A front electrical connection on the front face and a back electrical connection in the back hole are used to make electrical connection to first and second conductive plates of the multilayer capacitor which are separated by a dielectric layer. The front hole may have a cylindrical shape or an annular shape.