Backside Interconnect Nitride Barrier for Diffusion-Reliable Contacts

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Solution Overview

Problem

The semiconductor manufacturing process faces challenges in maintaining reliability and performance due to diffusion issues between conductive vias and traces in backside interconnects, which affect the integrity and efficiency of semiconductor devices.

Innovation Solution

Incorporating a nitride capping layer between conductive vias and traces in backside interconnects to prevent diffusion, using methods such as gate-all-around transistor structures and self-aligned patterning processes to enhance control over channel current flow and improve device reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conductive vias and traces are directly connected in backside interconnects, then manufacturing process is simplified, but diffusion occurs between conductive materials causing reliability issues

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoiddevice reliability
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

A nitride layer is introduced as an intermediary barrier between the conductive via and the conductive trace in the backside interconnect. This nitride layer prevents direct contact between the conductive materials, thereby stopping diffusion while maintaining the electrical connection function. The nitride layer acts as a diffusion barrier that resolves the reliability issue without significantly complicating the manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If geometry size is scaled down to increase functional density, then production efficiency increases and costs decrease, but manufacturing process complexity increases

Engineering Contradiction:
Improveproduction efficiencyVSAvoidmanufacturing process complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The backside interconnect structure is segmented into distinct functional layers: a conductive via layer, a nitride barrier layer, and a conductive trace layer. This segmentation allows each layer to be optimized independently for its specific function while maintaining compatibility with scaled-down geometries. The modular structure helps manage manufacturing complexity by breaking down the interconnect formation into discrete, controllable steps.

Inventive Principle:
Principle #1Segmentation

3Reliability

If nitride capping layer is added to prevent diffusion, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveintegrity of conductive pathwaysVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The nitride capping layer is applied locally only where diffusion prevention is critical - specifically at the interface between conductive vias and traces in the backside interconnect. Rather than adding nitride layers throughout the entire device, this localized application provides the necessary diffusion barrier precisely where needed, minimizing the overall increase in device complexity while maintaining reliability.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The nitride capping layer effectively prevents diffusion, enhancing the reliability and performance of semiconductor devices by maintaining the integrity of conductive pathways and reducing miscible contamination.

Implementation Method 1

Incorporating a nitride capping layer between conductive vias and traces in backside interconnects to prevent diffusion

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Data Source

PatentUS20250351520A1Semiconductor device and manufacturing method thereof
Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250351520A1 patent drawing
  • US20250351520A1 patent drawing
  • US20250351520A1 patent drawing

AI summary

A semiconductor device includes two source/drain features, a gate structure, a first contact plug, a second contact plug, a conductive line, and a nitride capping layer. The two source/drain features are laterally arranged to each other. The one or more channel layers connects the two source/drain features. The gate structure engages the one or more channel layers and interposes the two source/drain features. The first contact plug extends from above a first source/drain feature of the two source/drain features to the first source/drain feature. The second contact plug extends from below a second source/drain feature of the two source/drain features to the second source/drain feature. The conductive line is disposed underneath the second contact plug and electrically coupled to the second contact plug. The nitride capping layer is disposed between the second contact plug and the conductive line.