Backside Interconnection Layout for Low-Resistance Semiconductor Contacts
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing power transmission resistance and leakage issues due to the design of backside interconnection structures, which affect their efficiency and performance.
Innovation Solution
The introduction of a backside interconnection structure with a main portion and fingers that enhance the overlapping area with a backside conductive layer, along with features like protruding portions and cut-poly/cut-MD patterns to reduce electrical resistance and prevent leakage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a backside interconnection structure is introduced to improve electrical connectivity, then power transmission resistance decreases, but device complexity increases
Solution Approach 1:
The backside interconnection structure extends the interconnection from the front side to the back side of the semiconductor device, utilizing the third dimension (depth/thickness) to create additional conduction paths. This dimensional transition allows electrical connections to be established through the substrate, reducing resistance by providing alternative current pathways that bypass traditional front-side routing constraints.
Solution Approach 2:
The backside interconnection structure is divided into multiple segments including a backside interconnection region, protruding portions, and overlapping regions with conductive layers. This segmentation allows each portion to be optimized independently for its specific function while collectively achieving the overall goal of reduced transmission resistance and improved connectivity.
2Reliability
If the overlapping area of backside interconnection structure with backside conductive layer is increased to reduce resistance, then electrical connectivity improves, but manufacturing precision requirements increase
Solution Approach 1:
The backside interconnection structure is formed with pre-defined geometric features including protruding portions and specified overlapping areas with backside conductive layers. These features are established during the fabrication process before final assembly, ensuring that the required overlap for low-resistance connection is achieved without requiring high-precision alignment during subsequent steps. The preliminary formation of these structures reduces the stringency of alignment requirements.
3Reliability
If cut-poly/cut-MD patterns are introduced to prevent leakage, then device reliability improves, but device complexity increases
Solution Approach 1:
The cut-poly and cut-MD patterns selectively remove or interrupt specific conductive paths at strategic locations within the device. By extracting or discontinuing potential leakage paths only where necessary, rather than redesigning the entire interconnection system, the solution prevents leakage while maintaining the overall simplicity of the existing poly and MD layer structures.
Data Source
AI summary
A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a first type active region structure and a second type active region structure extending along a first direction. The semiconductor device also includes a first S/D contact over the first type active region structure and extending along a second direction different from the first direction. The semiconductor device further includes a backside conductive layer under the first type active region structure. In addition, the semiconductor device includes a backside interconnection structure between the backside conductive layer and the first type active region structure. The backside interconnection structure includes a first portion between the backside conductive layer and the first type active region structure, a second portion between the backside conductive layer and the second type active region structure, and a third portion connecting the first portion and the second portion.