Backside Mask Layer for Unique Die Mark Identifier Patterns

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Solution Overview

Problem

Existing methods for die marking on integrated circuit devices are challenging due to the need for unique labels on each die, which increases fabrication complexity, cost, and die size, especially on sensitive materials like Silicon Carbide (SiC) and Gallium Nitride (GaN), and require additional processing steps, compromising mechanical strength and traceability.

Innovation Solution

A photolithography-defined etching process on the backside of wafers creates unique die marks without increasing cost, die size, or process complexity, using through-wafer vias and conductive metal layers to form alphanumeric, bar code, or binary patterns that can be read optically through transparent substrates, eliminating the need for step-and-repeat operations for each die.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If direct laser marking is used to provide die traceability, then unique die identification is achieved, but mechanical strength of the die decreases and additional fabrication processing steps are required

Engineering Contradiction:
Improvedie traceabilityVSAvoidmechanical strength of die
Core Design Contradiction:
ReliabilityVSStrength

Solution Approach 1:

The patent uses optical reflection patterns to create die identification markers that are read optically without physical contact. Instead of permanently altering the die material through laser marking, the invention creates reflective patterns that copy identification information in a non-destructive manner, preserving mechanical strength while enabling traceability

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The invention replaces mechanical laser marking processes with an optical reading system. The die markers are read using optical reflection rather than physical contact or material removal, substituting a mechanical/thermal process with a non-contact optical method that preserves die integrity

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Reliability

If unique labels are added to every die for traceability, then die identification capability is improved, but device complexity and fabrication processing complexity increase

Engineering Contradiction:
Improvedie identification capabilityVSAvoidfabrication processing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines die marker formation with existing fabrication processes. The markers are created using standard photolithography and deposition techniques that are already part of the manufacturing flow, merging the traceability function with routine processing steps rather than adding separate complex operations

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The invention uses universal materials and processes that serve multiple functions. The same deposition and patterning techniques used for creating die markers are also used for creating functional device structures, making the traceability system universally applicable without requiring specialized equipment or processes

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If marking labels are placed on die to provide unique identification, then die traceability is achieved, but die size increases

Engineering Contradiction:
Improvedie traceabilityVSAvoiddie size
Core Design Contradiction:
ReliabilityVSArea of moving object

Solution Approach 1:

The patent places markers in specific local regions of the die where they do not interfere with active circuit areas. By positioning markers in dedicated zones or utilizing existing structural features, the invention provides traceability while minimizing impact on die area and maintaining local quality of functional regions

Inventive Principle:
Principle #3Local quality

4Reliability

If additional processing steps are added for die marking, then unique die labels can be formed, but manufacturing time and process complexity increase

Engineering Contradiction:
Improveunique die labelingVSAvoidmanufacturing throughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs die marker formation during the fabrication process before die singulation and packaging. By creating markers while the die are still on the wafer in bulk, the invention enables preliminary action that avoids subsequent individual die processing, thereby maintaining manufacturing throughput and productivity

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables die-level traceability with no impact on process complexity and minimal impact on die size, allowing for efficient identification of integrated circuit dies on wafers without additional processing layers or retention of photosensitive material.

Implementation Method 1

A photolithography-defined etching process on the backside of wafers creates unique die marks

Methodology Applied
Scientific EffectPhotolithography: Photography

Implementation Method 2

a patterned backside photoresist mask is used to form a unique die mark identifier pattern on the backside of the wafer by etching the underlying layer

Methodology Applied
Scientific EffectEtching: Ablation

Data Source

PatentUS11450616B2Using a backside mask layer for forming a unique die mark identifier pattern
Publication Date: 2022.09.20 NXP USA INC
  • US11450616B2 patent drawing
  • US11450616B2 patent drawing
  • US11450616B2 patent drawing

AI summary

A method of making a semiconductor device is provided for depositing, patterning, and developing photoresist (1703, 1704) on an underlying layer located on a backside of a wafer having a frontside on which an integrated circuit die are formed over a shared wafer semiconductor substrate and arranged in a grid, thereby forming a patterned photoresist mask with a unique set of one or more openings which are used to selectively etch the underlying layer to form, on each integrated circuit die, a unique die mark identifier pattern of etched openings in the underlying layer corresponding to the unique set of one or more openings in the patterned photoresist mask (1705), where the patterned photoresist mask is removed (1706) from the backside of the wafer before singulating the wafer to form a plurality of integrated circuit devices (1708) which each include a unique die marking.