Backside Security Mesh Connectivity for Semiconductor Tamper Detection
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Solution Overview
Problem
Integrated circuits with secure cryptographic keys are vulnerable to attacks that modify their metallization layers, allowing adversaries to extract or circumvent the keys, and existing security meshes only protect the front side of the chip, leaving the backside exposed to monitoring and tampering.
Innovation Solution
Implementing a backside security mesh with a conductive path between interconnect terminals and using a physically unclonable function (PUF) circuit to generate a fingerprint based on the unique physical characteristics of the metallization, which changes if the mesh is modified, thereby preventing unauthorized access and ensuring secure cryptographic operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a front-side security mesh is implemented to protect cryptographic keys, then the front side is protected from monitoring and tampering, but the backside remains exposed to attacks
Solution Approach 1:
The security mesh is divided into two separate meshes: a front-side security mesh and a backside security mesh. Each mesh independently protects its respective side of the integrated circuit die, ensuring comprehensive coverage against monitoring and tampering attacks from both front and back sides.
Solution Approach 2:
The security protection is extended from a single-dimensional front-side mesh to a two-dimensional approach by adding backside mesh connectivity. The backside mesh operates in a separate spatial dimension (the backside of the die), creating a holistic security envelope that addresses threats from all directions.
2Ease of operation
If the backside metal layer is made accessible for connectivity, then electrical connection is enabled, but the backside becomes vulnerable to monitoring and modification
Solution Approach 1:
The backside security mesh is预先 (pre-established) to counteract potential tampering attempts. The mesh is configured to detect any modification attempts, and the PUF circuit is pre-programmed to verify the integrity of the backside metal layer, enabling the system to reject unauthorized changes before they can compromise security.
Solution Approach 2:
The PUF circuit continuously monitors the electrical characteristics of the backside metal layer and provides feedback on its integrity. Any modification to the backside metal layer changes the PUF fingerprint, triggering a security response that prevents unauthorized access or operation.
3Reliability
If a PUF circuit is used to detect modifications, then security is enhanced through fingerprint verification, but the system complexity increases
Solution Approach 1:
The PUF circuit utilizes the inherent physical characteristics of the backside metal layer itself as the security credential. The metal layer's unique manufacturing variations naturally create a distinctive electrical fingerprint that the PUF circuit can read and verify, eliminating the need for external security credentials or complex verification infrastructure.
Data Source
Figure 1A~1B
Figure 2A~2B
Figure 3
AI summary
The embodiments herein are directed to technologies for backside security meshes of semiconductor packages. One package includes a substrate having a first interconnect terminal of a first type and a second interconnect terminal of a second type. The package also includes a first security mesh structure disposed on a first side of an integrated circuit die and a conductive path coupled between the first interconnect terminal and the second interconnect terminal. The first security mesh structure is coupled to the first interconnect terminal and the second interconnect terminal being coupled to a terminal on a second side of the integrated circuit die.