Backside Metal Routing in Integrated Circuits for Low-Resistance Signals
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Solution Overview
Problem
Existing integrated circuits face challenges in optimizing metal track arrangements for long-distance signal transmission, leading to increased resistivity and reduced performance as dimensions are scaled down.
Innovation Solution
The integrated circuit design incorporates backside metal routing with wider line widths and strategic placement of conductive structures to reduce signal path resistivity by utilizing backside metal lines for long-distance signal transmission.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional front-side metal routing is used for long-distance signal transmission, then the circuit layout is simplified, but the signal path resistivity increases and performance deteriorates
Solution Approach 1:
The patent utilizes the backside of the substrate as an additional dimension for metal routing. By forming metal lines on both the front side and backside of the substrate, the signal transmission path can extend into the third dimension (depth), allowing long-distance signals to be transmitted through backside metal lines with wider line widths, thereby reducing resistivity without compromising front-side circuit density.
Solution Approach 2:
The patent divides the metal routing function into segments: front-side metal lines handle short-distance and critical signal paths, while backside metal lines handle long-distance transmission paths. This segmentation allows each layer to be optimized for its specific function, with backside lines having wider widths for low-resistance transmission and front-side lines maintaining design flexibility.
2Reliability
If metal line width is increased to reduce resistivity, then signal transmission performance improves, but the area occupied by metal tracks increases
Solution Approach 1:
The patent resolves this contradiction by moving wide metal tracks to the backside of the substrate. The backside metal lines can have larger line widths and occupy more area without interfering with front-side circuit elements, as they serve different functional purposes. This allows aggressive optimization of resistance for long-distance paths without compromising front-side layout density.
Solution Approach 2:
The patent creates a complementary routing structure where the backside metal network mirrors or complements the front-side network. By copying the routing topology to the backside with enhanced line widths, the patent achieves low-resistance paths without duplicating the entire front-side layout, thus minimizing area overhead.
3Object-generated harmful factors
If logic circuits are spaced farther apart to reduce interference, then signal transmission distance increases, but the resistivity of metal tracks increases
Solution Approach 1:
The patent addresses this contradiction by introducing backside metal routing as an additional dimension for signal transmission. When front-side spacing must be increased to reduce interference, the backside provides alternative routing paths with wider line widths that compensate for the increased distance, maintaining low resistivity despite greater transmission lengths.
Solution Approach 2:
The backside metal lines act as intermediary transmission paths between front-side logic circuits. Instead of directly connecting distant front-side circuits with thin metal lines (which would have high resistance), the signal is routed through backside intermediaries with optimized line widths, reducing overall path resistivity while allowing greater spatial separation of front-side elements.
Data Source
AI summary
An integrated circuit includes a driver cell and at least one transmission cell. The driver cell includes a first active area and a second active area, and a first conductive line coupled to the first active area and the second active area on a back side of the integrated circuit. The at least one transmission cell having a second cell height includes a third active area and a fourth active area, a second conductive line coupled to the third active area and the fourth active area on the back side of the integrated circuit, and a conductor coupled to the third active area and the fourth active area. The integrated circuit further includes a third conductive line coupled between the first conductive line and the second conductive line on the back side to transmit a signal between the driver cell and the at least one transmission cell.