Backside Metallization Segmentation for Semiconductor Wafer Dicing
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Solution Overview
Problem
The challenge in producing semiconductor wafers with thick backside metallization is the reduced sawing quality due to blade clogging and wafer warpage caused by stress mismatch between front and back sides, leading to difficulties in handling and processing.
Innovation Solution
A plating preventative layer is formed over the kerf region of the semiconductor wafer, preventing metal plating and allowing for a structured backside metallization outside the kerf area, which improves dicing quality and reduces wafer warpage by ensuring equal metallization area matching between the front and back sides.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thick metallization is deposited on the backside of the wafer, then electrical contact and assembly requirements are satisfied, but sawing quality deteriorates due to blade clogging
Solution Approach 1:
The backside metallization is segmented into two functional zones: a first metallization layer covering the entire backside for electrical contact, and a second metallization layer selectively deposited only on non-kerf regions for enhanced assembly properties. This segmentation prevents metal accumulation in kerf areas, avoiding blade clogging while maintaining reliable electrical contact.
Solution Approach 2:
Different metallization characteristics are applied to different regions of the wafer backside. The kerf regions have only the first metallization layer (thinner, no second layer), while non-kerf regions have both first and second metallization layers (thicker for assembly). This local differentiation optimizes both sawing quality in kerf areas and assembly properties in device areas.
2Reliability
If thick metallization is deposited on the backside of the wafer, then assembly requirements are satisfied, but dicing quality deteriorates due to metal shearing and diamond clogging
Solution Approach 1:
The metallization structure is segmented such that kerf regions contain only the first metallization layer while non-kerf regions contain both first and second layers. This segmentation ensures that during dicing, the blade encounters minimal metal in kerf areas, preventing diamond clogging, while still providing thick metallization in non-kerf areas for reliable assembly.
Solution Approach 2:
The first metallization layer acts as an intermediary between the semiconductor substrate and the second metallization layer. In kerf regions, this single layer provides sufficient electrical contact without creating the clogging problems associated with thick metallization, thereby mediating between the conflicting requirements of electrical contact and dicing quality.
3Adaptability or versatility
If double-sided plating is performed with different metallization patterns, then front and back side functions are achieved, but wafer warpage occurs due to stress mismatch
Solution Approach 1:
The second metallization layer is applied selectively only to non-kerf regions rather than uniformly across the entire backside. This local quality approach allows different metallization thicknesses in different regions, enabling flexible pattern design while reducing overall stress accumulation that causes wafer warpage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances dicing efficiency by preventing blade clogging and reducing wafer warpage, resulting in a more reliable and cost-effective die separation process with improved metallization area matching.
Implementation Method 1
the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region
Implementation Method 2
a first metal layer or metal layer stack formed on a backside of the semiconductor material
Implementation Method 3
plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer
Data Source
AI summary
A method of processing a semiconductor wafer includes: forming a first metal layer or metal layer stack on a backside of the semiconductor wafer; forming a plating preventative layer on the first metal layer or metal layer stack, the plating preventative layer being formed at least over a kerf region of the semiconductor wafer and such that part of the first metal layer or metal layer stack is uncovered by the plating preventative layer, wherein the kerf region defines an area for dividing the semiconductor wafer along the kerf region into individual semiconductor dies; and plating a second metal layer or metal layer stack on the part of the first metal layer or metal layer stack uncovered by the plating preventative layer, wherein the plating preventative layer prevents plating of the second metal layer or metal layer stack over the kerf region.