Backside Metallization on Semiconductor Wafers

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Solution Overview

Problem

Current methods for forming backside metallization on semiconductor wafers, such as copper paste sintering, cause mechanical stress and deformation due to mismatched thermal expansion coefficients, especially in thin wafers, making it challenging for mass production and increasing the risk of wafer breakage.

Innovation Solution

A process flow that involves covering die regions of a semiconductor substrate with metal, forming dies, and subsequently annealing the metal after die separation to reduce thermal stress, using techniques like plasma dicing and sintering at controlled temperatures to enhance metal density and conductivity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If copper paste sintering is performed on semiconductor wafers to form backside metallization, then electrical conductivity is improved, but mechanical stress and deformation occur due to mismatched thermal expansion coefficients

Engineering Contradiction:
Improveelectrical conductivityVSAvoidwafer deformation
Core Design Contradiction:
ReliabilityVSShape

Solution Approach 1:

The patent applies preliminary action by performing the sintering process on the entire wafer before dicing into individual dies. This sequence allows the metallization to be formed while the wafer provides structural support, preventing deformation during sintering. The wafer acts as a carrier that maintains shape stability during the high-temperature sintering process, and only after metallization is complete is the wafer divided into individual dies.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If sintering is performed on thin wafers with metal paste, then backside metallization is achieved, but the risk of wafer breakage increases due to mechanical stress

Engineering Contradiction:
Improvebackside metallization formationVSAvoidwafer structural integrity
Core Design Contradiction:
Ease of manufactureVSStrength

Solution Approach 1:

The patent performs sintering before dicing, allowing thin wafers to be metallized while still supported by the full wafer structure. The wafer's overall structure provides mechanical strength during the sintering process, preventing breakage even in thin wafers. After sintering is complete and the metallization is established, the wafer is then divided into individual dies.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent segments the wafer into individual dies after the sintering process is complete. This segmentation approach allows the sintering to occur on the intact wafer where mechanical strength is maximized, and only after the metallization is established does the division into individual components occur.

Inventive Principle:
Principle #1Segmentation

3Reliability

If metal paste is applied and sintered on the wafer, then electrical conductivity is enhanced, but thermal expansion mismatch causes mechanical stress

Engineering Contradiction:
Improveelectrical conductivityVSAvoidmechanical stress
Core Design Contradiction:
ReliabilityVSStress or pressure

Solution Approach 1:

The patent performs sintering before dicing, allowing the metallization to be formed while the wafer provides structural support. This preliminary action enables the metallization process to complete under conditions of reduced mechanical stress, as the intact wafer structure distributes thermal expansion stresses more effectively than individual diced dies would.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces mechanical stress on the wafers during sintering, allowing for reliable backside metallization on diced semiconductor dies, improving thermal and electrical conductivity while preventing deformation and breakage, especially in thin wafers.

Implementation Method 1

subsequently, annealing the metal covering at least one die of the plurality of dies

Methodology Applied
Scientific EffectAnnealing: Annealing

Implementation Method 2

heating the substrate to a sintering temperature to sinter the metal particles

Methodology Applied
Scientific EffectSintering: Sintering

Implementation Method 3

mismatched thermal expansion coefficients

Methodology Applied
Scientific EffectThermal expansion: Thermal Expansion

Data Source

PatentUS9673096B2Method for processing a semiconductor substrate and a method for processing a semiconductor wafer
Publication Date: 2017.06.06 INFINEON TECHNOLOGIES AG
  • US9673096B2 patent drawing
  • US9673096B2 patent drawing
  • US9673096B2 patent drawing

AI summary

According to various embodiments, a method for processing a semiconductor substrate may include: covering a plurality of die regions of the semiconductor substrate with a metal; forming a plurality of dies from the semiconductor substrate, wherein each die of the plurality of dies is covered with the metal; and, subsequently, annealing the metal covering at least one die of the plurality of dies.