Backside Molding Layer Structure for Panel Warpage Reduction
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Solution Overview
Problem
Panel warpage in panel-level packaging technology poses challenges during manufacturing and assembly, leading to handling difficulties and low yields due to factors like epoxy molding compound shrinkage and mismatched thermal expansion coefficients, which hinder the use of larger panels.
Innovation Solution
A semiconductor carrier platform with a support panel and a backside molding layer having a selected coefficient of thermal expansion, combined with a removable film, is used to control and prevent panel warpage, enabling improved handling and processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If panel-level packaging uses larger panels to improve area utilization and production efficiency, then productivity increases, but panel warpage worsens due to epoxy molding compound shrinkage and thermal expansion mismatch
Solution Approach 1:
The patent applies parameter changes by carefully selecting and controlling the coefficient of thermal expansion (CTE) of the backside molding layer to match specific ranges (e.g., 60-80 ppm/°C or 70-90 ppm/°C) that compensate for the epoxy molding compound shrinkage and thermal expansion mismatch, thereby reducing panel warpage while maintaining high productivity
Solution Approach 2:
The patent uses composite materials by combining the support panel, epoxy molding compound, and backside molding layer into a multi-layer composite structure where each layer has specific material properties (particularly CTE values) that work together to minimize overall panel warpage during temperature cycling and curing processes
2Ease of manufacture
If panel size is increased to reduce material costs and improve area utilization, then cost efficiency improves, but handling capability deteriorates due to excessive warpage
Solution Approach 1:
The patent changes the CTE parameter of the backside molding layer to specific ranges that counterbalance the warpage forces generated in larger panels, enabling panels of 610 mm by 457 mm and larger to maintain sufficient flatness for handling while achieving cost efficiency through high area utilization
3Strength
If epoxy molding compound is used for encapsulation to provide structural support, then strength improves, but panel warpage worsens due to shrinkage during post-curing
Solution Approach 1:
The patent applies the counterweight principle by positioning a backside molding layer with specifically selected CTE properties on the opposite side of the epoxy molding compound, creating a balanced structure where the backside layer's thermal expansion characteristics counteract the shrinkage and warpage forces generated by the epoxy compound during post-curing
Solution Approach 2:
The patent changes the CTE parameter of the backside molding layer to match specific ranges that compensate for the epoxy molding compound shrinkage, thereby maintaining structural support strength while reducing panel warpage during and after curing processes
4Adaptability or versatility
If materials with different CTE values are used for encapsulation to provide functional compatibility, then adaptability improves, but panel warpage worsens due to thermal expansion mismatch
Solution Approach 1:
The patent carefully selects and controls the CTE parameter of the backside molding layer to specific ranges (60-80 ppm/°C or 70-90 ppm/°C) that are functionally compatible with the IC packages while simultaneously compensating for thermal expansion mismatch in the overall panel structure, thereby achieving both adaptability and warpage reduction
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces panel warpage, enhances processing tool alignment, and increases production throughput by providing structural support and thermal expansion compatibility, thus improving the handling and assembly of IC packages.
Implementation Method 1
the mismatch in the coefficients of thermal expansion (CTE) of the individual encapsulation materials and the carrier
Implementation Method 2
the shrinkage of the epoxy molding compound during the post-curing stage
Data Source
AI summary
The present disclosure is directed to a semiconductor carrier platform having a support panel with a top surface and a bottom surface, with the top surface providing a working surface for assembling IC packages using panel-level packaging technology. In an aspect, a backside molding layer may be positioned on the bottom surface of the support panel to prevent or correct any panel warpage. In another aspect, a removable film may be positioned between the bottom surface of the support panel and the backside molding layer to allow the support panel to be readily cleaned and reused.