Backside Optical Routing Structure for Compact SOI Photonic Chips
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Solution Overview
Problem
The formation of silicon nitride optical routing structures in photonic devices is limited by high-temperature annealing processes, which can damage other features in the circuit, leading to inefficient and large package structures due to thickness and position constraints.
Innovation Solution
The integration of photonic devices on a silicon-on-insulator (SOI) substrate with upper optical routing structures on the frontside and lower optical routing structures on the backside, utilizing silicon nitride on the backside to optimize photon travel and reduce package size, while avoiding high-temperature processing that could harm frontside features.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-temperature annealing processes are used to form silicon nitride optical routing structures, then optical routing functionality is achieved, but other features in the circuit are damaged
Solution Approach 1:
The patent divides the optical routing structure into two separate segments: an upper optical routing structure formed on the frontside of the substrate and a lower optical routing structure formed on the backside. This segmentation allows each structure to be formed independently using appropriate processing temperatures, avoiding the need for high-temperature annealing that would damage frontside features.
Solution Approach 2:
The patent transitions from a single-plane optical routing approach to a three-dimensional configuration by forming optical routing structures on both the frontside and backside of the substrate. This dimensional change enables optical paths to be established without requiring high-temperature processing of the entire structure, as the lower structure on the backside can be formed at lower temperatures.
2Manufacturing precision
If thickness and position constraints are applied to optical routing structures, then manufacturing precision is maintained, but package size increases
Solution Approach 1:
By forming optical routing structures on both the frontside and backside of the substrate, the patent utilizes the vertical dimension (z-axis) to create compact optical paths. This three-dimensional configuration reduces the lateral footprint and overall package size while maintaining precise control over optical structure positions through separate formation processes.
Solution Approach 2:
The upper and lower optical routing structures are nested within the vertical space of the substrate package, with the lower structure on the backside and the upper structure on the frontside. This nesting arrangement allows both structures to coexist in a compact volume without interfering with each other, reducing the overall package size while maintaining manufacturing precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances device reliability and efficiency by allowing for optimized optical communication and reduced package size without damaging other photonic device components, enabling more compact and effective photonic devices.
Implementation Method 1
an anti-reflective layer arranged below and directly contacting the substrate
Implementation Method 2
upper optical routing structure arranged over the insulator layer and comprising a semiconductor material; lower optical routing structure arranged below the substrate and embedded in a lower dielectric structure
Data Source
AI summary
In some embodiments, the present disclosure relates to an integrated chip that includes an insulator layer arranged over a substrate. Further, an upper routing structure is arranged over the insulator layer and is made of a semiconductor material. A lower optical routing structure is arranged below the substrate and is embedded in a lower dielectric structure. The integrated chip further includes an anti-reflective layer that is arranged below the substrate and directly contacts the substrate.