Backside Passive Elements for 3D Wafer Alignment
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Solution Overview
Problem
Integrating traditionally incompatible semiconductor technologies on a single die for multichip packages poses challenges in alignment and bonding, leading to inefficiencies in device density and performance.
Innovation Solution
The use of passive circuit elements such as inductors and capacitors on the backside of wafers to facilitate precise alignment through capacitance measurement, allowing for vertical and lateral adjustment until optimal alignment is achieved, enabling accurate stacking and bonding of wafers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple dies are stacked vertically to increase device density, then device density and performance are improved, but alignment precision between wafers becomes more difficult to achieve
Solution Approach 1:
Passive circuit elements (inductors or capacitors) are introduced as intermediary alignment markers on each wafer. These elements create measurable electrical signals (capacitance values) that serve as mediators to detect and quantify the alignment state between stacked wafers, enabling precise adjustment before final bonding.
Solution Approach 2:
The patent replaces mechanical alignment methods with electrical measurement methods. Instead of using mechanical fixtures or visual alignment, the system uses electrical signals applied to passive circuit elements to measure capacitance, which correlates to the vertical distance and lateral alignment between wafers, providing a more precise and automated alignment process.
2Ease of manufacture
If traditional alignment methods are used for multichip packages, then manufacturing process is simpler, but alignment accuracy and bonding reliability deteriorate
Solution Approach 1:
The alignment process incorporates feedback through electrical measurement. The test circuit measures capacitance values from passive circuit elements on adjacent wafers, providing real-time feedback on alignment status. This feedback loop allows the system to detect misalignment and guide adjustment until optimal alignment is achieved, ensuring bonding reliability without significantly complicating the manufacturing process.
3Manufacturing precision
If passive circuit elements are added to wafers for alignment, then alignment precision is improved, but device complexity increases
Solution Approach 1:
The alignment function is extracted from the main functional circuitry. Passive circuit elements are dedicated solely to alignment purposes and are electrically disconnected from the operational circuits through switches or transistors. This separation allows the alignment system to be added without increasing the complexity of the functional device, as the alignment elements can be independently controlled and do not interfere with normal device operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method ensures accurate alignment and bonding of wafers, enhancing device density and performance by ensuring proper electrical connectivity between stacked dies, thereby overcoming the limitations of integrating incompatible technologies.
Implementation Method 1
Passive circuit components on each wafer are thus held a known fixed distance from each other, thereby creating a capacitance between the passive circuit elements
Implementation Method 2
The capacitance value is proportional to the overlapping area of passive elements. The capacitance between the passive elements indicates the vertical alignment of the passive circuit elements because the vertical alignment determines the area of lateral overlap of the passive circuit elements
Data Source
AI summary
Passive circuit elements are formed at surfaces of two integrated circuit wafers. The passive circuit elements are utilized to align the two integrated circuit wafers to form an integrated circuit wafer stack.