Backside Passive Components Using Self-Assembled Monolayer Structuring
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional processes for forming structures on the backside of semiconductor dies in stacked die assemblies are inefficient, as they do not effectively utilize the area for RF and analog circuits, leading to suboptimal performance due to parasitics and poor utilization of space.
Innovation Solution
The use of a self-assembled monolayer (SAM) assisted structuring process, which involves activating a dielectric surface, forming a SAM, and reacting it with a catalyst and metal to create conductive regions on the backside of the die, allowing for the formation of optimized passive components like inductors and capacitors, and a redistribution layer to improve signal distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional lithographic methods are used to form structures on the backside of the die, then the manufacturing process is simple and well-established, but the quality factor of passive components is low and parasitics are high
Solution Approach 1:
A self-assembled monolayer (SAM) is introduced as an intermediary between the dielectric surface and the metal catalyst. The SAM acts as a mediator that enables selective catalytic metal deposition through chemical reactions, allowing formation of high-quality passive components with reduced parasitics while maintaining process feasibility
Solution Approach 2:
The patent changes the chemical and physical parameters of the dielectric surface by activating it and forming a SAM layer with specific chemical properties. This parameter change enables selective reaction with catalysts and metals, resulting in improved quality factor and reduced parasitics compared to conventional lithographic approaches
2Area of stationary object
If the backside area is not utilized for RF and analog circuits, then the manufacturing process is simple, but the space utilization is poor and performance is suboptimal
Solution Approach 1:
The patent utilizes the backside dimension of the die, which is typically underutilized, to form passive components and redistribution layers. By transitioning from front-side-only fabrication to backside integration, the patent effectively adds a new dimensional space for circuit implementation, improving space utilization without significantly complicating the manufacturing process
Solution Approach 2:
The self-assembled monolayer performs multiple functions automatically: it activates the dielectric surface, provides selective binding sites for catalysts, and guides metal deposition. This self-service capability enables complex backside structuring with simplified process steps, improving both area utilization and manufacturing efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the quality factor of passive components and reduces parasitics by positioning them on the backside, leading to improved performance and efficient use of space on the die, thereby optimizing the backside area for RF and analog applications.
Implementation Method 1
forming a self-assembled monolayer (SAM) on the activated dielectric surface
Implementation Method 2
reacting it with a catalyst and metal to create conductive regions
Data Source
AI summary
Embodiments include devices and methods, including a device including a substrate comprising a semiconductor, the substrate including a front side comprising active elements and a backside opposite the front side. The device includes a dielectric layer on the backside, and a passive component on the dielectric layer on the backside. In certain embodiments, the passive device is formed on a self-assembled monolayer (SAM). Other embodiments are described and claimed.