Back-Side PIC Processing for Localized Optical and Thermal Isolation
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Solution Overview
Problem
Integrated photonic platforms face interaction-dependent optical, thermal, and electrical losses and modifications due to limitations in buried oxide layer thickness, leading to reduced system performance, especially in high-frequency and temperature-tunable systems, and are challenging to integrate with standard CMOS foundries.
Innovation Solution
A method involving back-side processing techniques to selectively remove portions of the silicon handle layer, using alignment structures and a temporary handle, allowing for controlled removal and deposition of materials to enhance optical, thermal, and electrical isolation, while maintaining mechanical stability and compatibility with standard tools.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Illumination intensity
If the buried oxide layer thickness is reduced to improve optical confinement, then the index contrast between silicon and silicon dioxide is enhanced, but interaction-dependent optical, thermal, and electrical losses increase
Solution Approach 1:
The patent divides the handle layer into multiple regions with different thicknesses: a first region with greater thickness providing mechanical support and a second region with reduced thickness providing thermal isolation. This segmentation allows simultaneous optimization of mechanical stability and thermal performance without increasing overall losses.
Solution Approach 2:
The patent applies local quality by creating spatially varying handle layer thicknesses tailored to specific functional requirements. Different regions of the photonic integrated circuit receive customized handle layer thicknesses optimized for their specific optical, thermal, or electrical isolation needs, rather than applying a uniform thickness throughout.
2Volume of moving object
If the buried oxide layer is made thinner to enhance optical confinement, then compact PIC design is improved, but thermal and electrical isolation deteriorate
Solution Approach 1:
The handle layer is segmented into regions of different thicknesses, allowing thin regions for compact optical confinement and thicker regions for thermal isolation where needed, achieving both compactness and thermal management.
Solution Approach 2:
The patent addresses thermal isolation not by uniformly increasing oxide thickness but by creating localized thickness variations in the handle layer, adding spatial dimensionality to the solution rather than simply scaling up in one direction.
3Loss of energy
If back-side processing is used to remove handle material, then optical isolation is improved, but device complexity and processing difficulty increase
Solution Approach 1:
The patent performs preliminary actions by forming alignment structures and thickness markers before the actual handle removal process. These preliminary structures guide subsequent processing steps, ensuring accurate material removal while simplifying the overall process control.
Solution Approach 2:
The patent introduces intermediary structures such as alignment markers and thickness markers that mediate between the processing tools and the final handle layer configuration. These intermediaries enable precise control of the back-side processing without requiring complex direct control mechanisms.
4Loss of energy
If selective handle removal is performed to enhance isolation, then optical, thermal, and electrical performance is improved, but mechanical stability may be compromised
Solution Approach 1:
The handle layer is segmented into thick support regions and thin isolation regions, distributing mechanical loads appropriately while maintaining isolation performance in specific areas. This segmentation prevents compromise of overall mechanical stability.
Solution Approach 2:
The patent applies local quality by providing enhanced mechanical support in specific regions where structural integrity is critical, while allowing thinner handle layers in regions where isolation performance is the priority, achieving both mechanical stability and isolation performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Reduces interaction-dependent losses and modifications, enhances mechanical stability, and maintains compatibility with standard CMOS foundries, improving performance and reliability of photonic integrated circuits.
Implementation Method 1
a middle volume of the photonic integrated circuit, located on top of the bottom volume, the middle volume comprising a second material characterized by a second index of refraction smaller than the first index of refraction
Data Source
AI summary
An article of manufacture comprises a bottom volume comprising a first region composed of a first material characterized by a first index of refraction (IOR) and having a first thickness, and thinned regions in which a portion of the first material is absent or has a thickness less than the first thickness; a middle volume on top of the bottom volume and comprising a second material characterized by a second IOR smaller than the first IOR; and a top volume on top of the middle volume and comprising alignment structures, and a photonic structure; where the top and middle volumes are in contact at an interface plane, and spatial coordinates specify two-dimensional positions, within at least one thinned region in a second plane parallel to the interface plane and with respect to the alignment structures, of portions of the photonic structure in a first plane parallel to the interface plane.


