Backside-Illuminated Pixel Circuit for High Quantum Efficiency
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Solution Overview
Problem
Traditional phototransistors suffer from low quantum efficiency, large size, and incompatibility with CMOS processes, making them unsuitable for high-resolution imaging applications and prone to crosstalk in arrays of photoelectric sensors.
Innovation Solution
A photoelectric sensor design featuring a doped region and field-effect transistor on a common substrate with isolation regions to prevent crosstalk, compatible with back-side illumination CMOS image sensors, allowing for small-sized devices with high quantum efficiency and dynamic range.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If traditional phototransistor structure is used, then photocurrent amplification is achieved, but quantum efficiency decreases due to light reflection and refraction losses
Solution Approach 1:
The patent inverts the traditional phototransistor structure by placing the photodiode at the back of the substrate rather than the front. This back-illumination approach eliminates the need for light to pass through passivation layers, interconnection insulation layers, and metal layers, thereby eliminating reflection and refraction losses that previously reduced quantum efficiency.
2Power
If traditional phototransistor is used, then photocurrent amplification is achieved, but device size becomes larger compared to CMOS devices
Solution Approach 1:
The patent merges the photodiode and field-effect transistor into a single integrated structure on the same substrate. The photodiode is formed at the back surface while the FET is formed on the front surface, with the substrate serving as a common base. This integration eliminates the need for separate phototransistor structures, significantly reducing device area while maintaining photocurrent amplification capability through the FET's intrinsic gain.
3Power
If traditional phototransistor is used, then photocurrent amplification is achieved, but compatibility with standard CMOS process is lost
Solution Approach 1:
The patent segments the photoelectric sensor into two independent but integrated components: a photodiode formed at the back surface and a field-effect transistor formed on the front surface. This segmentation allows each component to be fabricated using standard CMOS processes independently, while their integration through the common substrate maintains electrical connection. The FET provides the required photocurrent amplification without compromising CMOS process compatibility.
4Measurement precision
If multiple photoelectric sensors are arranged in array, then imaging resolution is improved, but crosstalk between adjacent sensors increases
Solution Approach 1:
The patent extracts and removes the substrate from the traditional phototransistor structure, using it instead as a common base for integrating the photodiode and FET. This extracted substrate approach allows for precise control of electrical connections and isolation between adjacent pixels, reducing crosstalk while maintaining high imaging resolution through compact array arrangement.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances quantum efficiency, reduces device size, and prevents crosstalk, enabling high-resolution imaging and compatibility with CMOS processes, with a dynamic range exceeding 160 dB and high gain modes.
Implementation Method 1
A doped region and a cathode are formed on the bottom surface of the substrate and form an integrated back-side illumination photoelectric sensor consisting of a photodiode
Implementation Method 2
a doped source region and the doped drain region are separated apart on top of the substrate so as to form a field-effect transistor
Data Source
AI summary
Provided is a photoelectric sensor, a random accessible active pixel circuit, an image sensor and a camera. A photoelectric sensor comprises a doped region, a substrate, a doped source region, a doped drain region, and two isolation regions; wherein the doped region is arranged on a bottom surface of the substrate so as to form a photodiode; a cathode of the photodiode is formed in the doped region and is connected to a positive voltage to make the photodiode work in a reverse bias region; wherein the doped source region and the doped drain region are spaced apart on top of the substrate so as to form a field effect transistor; a source is formed on a top surface of the doped source region, and a drain is formed on the top surface of the doped drain region; wherein the two isolation regions are arranged on opposite sides of the substrate, and extend from the doped source region and the doped drain region to the doped region; wherein a gate dielectric layer and a gate between the doped source region and the doped drain region are configured sequentially upwards from the top surface of the substrate; the gate is connected to a voltage to make the field effect transistor select wide dynamic range mode or high gain mode.