Backside Source/Drain Placeholder Structure for Epitaxy Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Challenges exist in semiconductor fabrication related to placeholder depth control, profile control, epitaxial growth control, and silicon removal damage to source/drain epitaxy regions, particularly due to imperfect bottom dielectric isolation and exposure to hafnium oxide.

Innovation Solution

Incorporating a placeholder structure under each source/drain epitaxy region, using a silicon germanium (SiGe) placeholder to isolate source/drain regions from the substrate, and employing a backside block copolymer mask for selective removal during backside contact formation, with precise control over SiGe position to mitigate damage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a placeholder structure is used to isolate source/drain regions from the substrate, then damage to source/drain epitaxy regions is reduced, but device complexity increases

Engineering Contradiction:
Improvedamage reduction to source/drain epitaxy regionsVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

A placeholder structure comprising a first dielectric layer and a silicon buffer layer is introduced as an intermediary between the substrate and source/drain epitaxy regions. This placeholder acts as a protective mediator that prevents direct contact between potentially damaging substrate materials (such as hafnium oxide) and the sensitive source/drain epitaxy regions, thereby reducing damage while maintaining a manageable structural complexity through its sacrificial nature and systematic integration into the fabrication process.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If bottom dielectric isolation is used, then source/drain regions are isolated from the substrate, but imperfect isolation causes exposure to hafnium oxide leading to damage

Engineering Contradiction:
Improveisolation effectivenessVSAvoidexposure to hafnium oxide
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The placeholder structure is formed beforehand during the fabrication process, prior to the formation of backside contacts and exposure to hafnium oxide. The silicon buffer layer and first dielectric layer are deposited and patterned to create a protective cushion that preemptively shields the source/drain epitaxy regions from harmful exposure to hafnium oxide and other damaging factors, ensuring reliable isolation even when bottom dielectric isolation is imperfect.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

3Ease of manufacture

If selective removal of substrate is performed during backside contact formation, then backside contacts are formed, but source/drain epitaxy regions may be damaged

Engineering Contradiction:
Improvebackside contact formationVSAvoiddamage to source/drain epitaxy regions
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The placeholder structure is selectively removed (taken out) after it has served its protective function. During backside contact formation, the substrate is selectively removed in regions where backside contacts are to be formed, while the placeholder structure remains in place to protect adjacent source/drain epitaxy regions. After the backside contacts are formed, the placeholder structure is subsequently removed, having fulfilled its protective role during the critical manufacturing step.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20240421037A1Source/drain protection using a backside placeholder
Publication Date: 2024.12.19 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240421037A1 patent drawing
  • US20240421037A1 patent drawing
  • US20240421037A1 patent drawing

AI summary

Embodiments of the invention include a method for fabricating a semiconductor device and the resulting structure. A plurality of nanosheet recesses are formed within a substrate. A placeholder structure is formed on a bottom surface within each nanosheet recess. A first source/drain region is formed within a first nanosheet recess. A second source/drain region is formed within the second nanosheet recess. The semiconductor structure is flipped. The substrate is removed respective to a sidewall spacer of the placeholder structure and a first etch stop layer of the placeholder structure. Backside interlayer dielectric is formed. A backside contact trench to the second source drain region is formed by removing a portion of the backside interlayer dielectric over the second source/drain region and removing exposed portions of the first etch stop layer, the sidewall spacer, and a silicon buffer layer of the placeholder structure. A backside contact is formed within the trench.