Backside Power Delivery Network With Self-Aligned Buried Power Rails
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Solution Overview
Problem
Existing semiconductor integrated circuit designs face challenges with alignment issues and processing complexities due to the formation of high-aspect ratio, tight-pitched through silicon vias (μTSVs) for backside power delivery networks, which require additional wafer flipping and complex manufacturing steps.
Innovation Solution
The implementation of an early backside power delivery network (EBPDN) with buried power rails (BPRs) using damascene/dual damascene processes and a self-aligned via connection, allowing for efficient connection of BPRs to EBPDN wiring through a highly selective etch-stop layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If high-aspect ratio, tight-pitched μTSVs are used to connect backside power delivery network to buried power rails, then electrical connection is achieved, but alignment issues and processing complexities arise
Solution Approach 1:
The patent applies preliminary action by forming the backside power delivery network early in the fabrication process, before the semiconductor devices are completed. This allows the power delivery network to be established on the backside of the substrate while the frontside devices are being manufactured, avoiding the need for complex high-aspect ratio vias to connect later-formed power networks to buried power rails.
2Area of stationary object
If wafer flipping is performed to form backside power delivery network, then routing space is freed on front side, but additional processing steps and alignment issues occur
Solution Approach 1:
The patent applies segmentation by separating the fabrication process into distinct phases: forming the backside power delivery network on the backside of the substrate, then flipping the substrate to continue device fabrication on the frontside. This segmentation allows each side to be processed independently with optimized procedures, avoiding the need for complex through-silicon via formation that would require additional alignment steps.
3Area of stationary object
If buried power rails are formed after device layers, then front-side routing space is freed, but additional processes including wafer flipping and high-aspect ratio vias are required
Solution Approach 1:
The patent forms the backside power delivery network including power rails and distribution lines early in the process on the backside of the substrate, before completing the frontside device fabrication. This preliminary formation eliminates the need for subsequent wafer flipping and high-aspect ratio via formation, streamlining the manufacturing process and improving productivity.
Data Source
AI summary
A semiconductor structure and method of manufacturing a semiconductor structure having a front side and an opposing backside. An early power delivery network (EBPDN) of wires is built above a substrate layer. Buried power rails (BPRs) are built above levels of the PDN and connected to the EBPDN by short length via connections that can be self-aligned to the back side buried power rails. Both BPRs and vias connections have a common metallization. A front side level of transistor devices are built at the front side of the structure above the BPRs. The resulting formed buried power rail structure has an aspect ratio of height:width greater than 4:1, a height >3 times a height of the formed via structure; and a via structure having a length greater than a height of the formed conductive power rail structure.