Backside Power Delivery Structure for Shorter Multi-Height Standard Cells
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Solution Overview
Problem
The scaling of multi-gate transistors in integrated circuits faces challenges due to variability in conventional fabrication processes, limiting further miniaturization beyond the 10 nanometer node, and requires new methodologies for efficient power delivery in tight spaces.
Innovation Solution
Implementing backside power delivery, where power is delivered directly to transistors from the wafer's backside, reducing the need for front-side power routing and allowing for shorter standard cell height, lower power network resistance, and improved performance by utilizing border tracks for signal routing and parasitic RC improvements.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If front-side power delivery is used, then power can be delivered to transistors, but cell height increases and parasitic RC is higher
Solution Approach 1:
The patent delivers power from the backside of the substrate rather than the front side, utilizing the third dimension (depth/substrate thickness) to route power contacts directly to transistor regions. This dimensional change allows power delivery without increasing planar cell footprint or height, while reducing parasitic resistance by shortening current paths through the substrate.
2Quantity of substance
If feature size is scaled down to increase device density, then capacity increases, but fabrication variability worsens and process constraints become overwhelming
Solution Approach 1:
The patent segments the power delivery function from the signal routing function by using separate backside power contacts and front-side signal interconnects. This segmentation allows independent optimization of power delivery paths and signal routing, reducing process constraints and improving manufacturability at scaled dimensions where simultaneous control of both functions becomes difficult.
3Power
If more power routing is integrated on the front side, then power delivery capability improves, but available space for signal routing decreases
Solution Approach 1:
The patent extracts the power delivery function from the front-side interconnect structure and relocates it to the backside of the substrate. This extraction frees up front-side routing resources for signal connections, reducing layout complexity and allowing more flexible signal routing without compromising power delivery capability.
Data Source
AI summary
Integrated circuit structures having backside power delivery for multi-height standard cell circuits are described. In an example, an integrated circuit structure includes a front-side structure including a device layer including a first cell separated from a second cell by a cell boundary, and a metallization layer immediately above the device layer. A track of the metallization layer is along the cell boundary from a plan view perspective. A backside structure is below the device layer. The backside structure provides power to the device layer.