Semiconductor Device With Backside Power Delivery Connections
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing integration of semiconductor devices poses challenges in maintaining reliability and electrical properties, particularly in backside power delivery networks (BSPDN) structures where power rails are disposed on the wafer backside.
Innovation Solution
A semiconductor device design incorporating a first and second transistor configuration with specific channel and source/drain regions, connected by conductive and backside connection patterns, and a backside power delivery network (BSPDN) for improved electrical connectivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration of semiconductor devices is increased, then productivity and functionality are improved, but reliability and electrical properties deteriorate due to increased complexity and resistance issues in backside power delivery networks
Solution Approach 1:
The patent implements a backside power delivery network (BSPDN) structure where power rails are disposed on the back side of the wafer instead of the front side. This dimensional change separates power delivery from signal transmission layers, reducing interference and resistance issues while maintaining high integration density. The connection structures extend through the substrate to establish electrical pathways between frontside transistors and backside power rails.
Solution Approach 2:
The patent introduces intermediate connection structures including conductive connection patterns and connection plugs that mediate between the frontside transistor regions and backside power rails. These intermediary elements facilitate efficient power delivery by creating low-resistance pathways through the substrate, thereby maintaining reliability despite increased integration.
2Use of energy by moving object
If power rails are disposed on the back side of the wafer in BSPDN structure, then power delivery efficiency is improved, but manufacturing complexity increases
Solution Approach 1:
The patent segments the power delivery function from the signal processing function by placing power rails on the back side and transistors on the front side. The connection structures are segmented into multiple components including connection plugs, conductive connection patterns, and insulating layers. This segmentation allows each component to be optimized independently while managing manufacturing complexity through modular construction.
Solution Approach 2:
The connection structures serve multiple functions: they provide electrical connectivity between frontside transistors and backside power rails, act as mechanical support, and provide thermal management pathways. The conductive connection patterns simultaneously serve as power delivery paths and structural elements, reducing the need for separate components and simplifying manufacturing.
3Reliability
If multiple connection structures are implemented to connect frontside transistors to backside power rails, then electrical connectivity is improved, but device complexity increases
Solution Approach 1:
The patent merges multiple connection functions into integrated connection structures that combine conductive connection patterns, insulating layers, and connection plugs into a unified multi-layer architecture. This merging approach maintains reliable electrical connectivity while reducing the number of discrete components and simplifying the overall device structure compared to implementing separate independent connection elements.
Data Source
AI summary
A semiconductor device includes a first transistor including a first gate electrode, a first gate dielectric layer, a first source/drain region, a second source/drain region, and a first channel region, a second transistor at a same level as the first transistor, the second transistor including a second gate electrode, a second gate dielectric layer, a third source/drain region, a fourth source/drain region, and a second channel region, a first source/drain backside contact structure below the first source/drain region and connected to the first source/drain region, a conductive connection pattern including at least a portion that is at a same level as the first and second gate electrodes, a backside connection pattern connected to the conductive connection pattern, a frontside connection pattern connected to the conductive connection pattern, and a first frontside contact plug on the second transistor and connected to the second transistor.