Backside Power Delivery for High-Speed Signal Integrity
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Solution Overview
Problem
Conventional electronic devices face limitations in high-speed data communication due to the occupation of I/O pins by power signals and the adverse parasitic effects of passive components, which hinder the performance of high-speed circuitry.
Innovation Solution
The electronic device employs a carrier with conductive elements and electronic components arranged such that power signals are transmitted through the backside surface of the components, reducing the need for I/O pins on the active surface and minimizing parasitic effects by using a non-power path that bypasses the carrier, allowing for more efficient signal transmission and reduced parasitic impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If power signals are transmitted through the active surface I/O pins, then electrical connections are established, but the number of available I/O pins for high-speed signals is reduced
Solution Approach 1:
The patent introduces a third dimension for power signal transmission by routing power signals through the thickness direction (via conductive vias) rather than through the planar active surface. This vertical power delivery network frees up horizontal I/O pins exclusively for high-speed signal transmission, effectively resolving the pin occupation conflict through spatial dimensionality change.
2Adaptability or versatility
If passive components are added to meet high-speed data communication demands, then circuit functionality is improved, but parasitic effects increase and affect electronic performance
Solution Approach 1:
The patent extracts the power delivery function from the signal transmission path by implementing a separate vertical power network. This separation removes the parasitic effects associated with passive components from the high-speed signal path, allowing the signal transmission to proceed without degradation while still providing the necessary power delivery capability through a different routing mechanism.
3Power
If conventional power signal routing is used through the carrier surface, then power delivery is achieved, but signal delay and parasitic effects increase
Solution Approach 1:
The patent implements vertical power delivery through conductive vias that traverse the carrier thickness, delivering power signals directly to the backside surface of electronic components. This three-dimensional power routing path shortens the current path length compared to conventional surface routing, thereby reducing inductance and signal delay while maintaining effective power delivery.
Data Source
AI summary
An electronic device is disclosed. The electronic device includes a carrier including a first portion, a second portion over the first portion, and a third portion connecting the first portion and the second portion. The electronic device also includes a first electronic component disposed between the first portion and the second portion. An active surface of the first electronic component faces the second portion. The electronic device also includes a second electronic component disposed over the second portion. The first portion is configured to transmit a first power signal to a backside surface of the first electronic component opposite to the active surface.