Backside Power Rail Feedthrough Layout for Lower IR Drop
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Solution Overview
Problem
As integrated circuit technologies progress towards smaller technology nodes, the routing structures, such as backside power rails, face challenges with increased IR drop due to limited parallel paths for power mesh connections, which affect the performance of semiconductor structures.
Innovation Solution
The formation of enhancement interconnects in non-functional active regions by removing larger non-functional active regions and replacing them with feedthrough vias between backside and front-side power lines, along with forming backside connection features between source/drain regions of floating transistors, provides additional parallel paths for the power mesh, thereby decreasing IR drop.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If routing structures are moved to the backside of the semiconductor structure, then routing flexibility is improved, but IR drop increases due to limited parallel paths for power mesh connections
Solution Approach 1:
The non-functional active regions are segmented into multiple smaller regions, with feedthrough vias formed in each segment. This segmentation creates multiple parallel current paths from the backside power line to the front-side power line, reducing IR drop while maintaining routing flexibility.
Solution Approach 2:
The patent utilizes the vertical dimension by forming feedthrough vias that extend through the device layer from the backside to the front-side. This three-dimensional approach creates additional parallel paths without increasing the planar footprint, effectively reducing IR drop while maintaining the backside routing configuration.
2Loss of energy
If non-functional active regions are removed and replaced with feedthrough vias, then parallel paths for power mesh are increased, but device complexity increases
Solution Approach 1:
The feedthrough vias serve multiple functions: they provide electrical connection between backside and front-side power lines, act as current paths to reduce IR drop, and utilize the space of removed non-functional active regions. This multi-functionality reduces the need for separate structures, thereby limiting the increase in device complexity.
Solution Approach 2:
Non-functional active regions that would otherwise be discarded are instead recovered and repurposed as locations for forming feedthrough vias. This approach converts potentially wasted space into useful current paths, reducing IR drop without requiring additional area or significantly increasing complexity.
Data Source
AI summary
A semiconductor structure is provided. The semiconductor structure includes a plurality of transistors formed in an active region of a device layer, a first power line disposed on a front side of the device layer and extending in a first direction, a first connecting feature disposed on a source/drain region of the transistors and extending in a second direction perpendicular to the first direction, a second power line disposed on a back side of the device layer and extending in the first direction, and a feedthrough via formed on and in contact with the second power line. The active region extending in the first direction and the feedthrough via are disposed on two opposite sides of the first power line from a top view. The second power line is electrically connected to the source/drain region of the transistors through the feedthrough via and the first connecting feature.