Backside Power Gating Through Dummy Transistors in Chip Layouts
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Solution Overview
Problem
Existing wafer fabrication methods for backside power gating transistors involve complex processes and lack effective power control between the back end of line (BEOL) and backside power delivery network (BSPDN), leading to unnecessary power consumption and inefficient use of semiconductor wafer space.
Innovation Solution
A semiconductor chip device with dummy transistors positioned between a backside power delivery network and analog or digital circuit elements, controlled by a power gating transistor, allowing controlled power delivery from the backside to the front side, reducing the need for complex backside formation processes and optimizing wafer real estate for functional devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dummy devices are used for power connections between BEOL and BSPDN, then power connections are established, but power control is lost resulting in unnecessary power consumption
Solution Approach 1:
A control transistor is introduced as an intermediary device between the dummy power connection devices and the BEOL circuitry. This control transistor acts as a mediator that can selectively enable or disable power flow through the dummy devices, thereby maintaining reliable power connections when needed while preventing unnecessary power consumption when the connected circuitry is inactive.
2Ease of manufacture
If backside contact schemes are used, then fabrication processes are simplified, but power leakage occurs through the backside contacts
Solution Approach 1:
Control transistors are positioned as intermediary devices between the backside contact structures and the front-side circuitry. These control transistors maintain the simplified backside contact fabrication approach while preventing power leakage by blocking current flow when the associated functional circuits are not active.
3Power
If more space is allocated for backside power delivery structures, then power delivery capability is improved, but front side footprint for functional devices is reduced
Solution Approach 1:
The power delivery infrastructure is moved from the front side to the back side of the semiconductor device. By routing power delivery networks and dummy power connection devices through the backside contacts and BSPDN, the front side footprint is preserved for functional devices while power delivery capability is maintained through the three-dimensional power path from backside to frontside.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enables efficient power management by controlling power consumption through the use of dummy transistors, reducing unnecessary power leakage and maximizing the front side footprint for functional components, while simplifying the fabrication process.
Implementation Method 1
Power from the power input line is provided from the backside power delivery network, through the dummy transistors, and controlled by the power gating transistor for transfer to the analog or digital circuit elements
Data Source
AI summary
A semiconductor chip device includes a substrate with a back end of line layer and a backside power delivery network. An input power line is electrically coupled to the backside power delivery network. Dummy transistors are positioned in a circuit with analog or digital circuit elements. A power gating transistor is positioned in the circuit between the dummy transistors and the analog or digital circuit elements. Power from the power input line is provided from the backside power delivery network, through the dummy transistors, and controlled by the power gating transistor for transfer to the analog or digital circuit elements. The device uses a backside delivery of power to the area of the dummy transistors to transfer power into the analog or digital circuit elements, which leaves more of the front side footprint for functional devices.