Backside Power Path Layout for Signal-Isolated IC Packaging

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Solution Overview

Problem

Interference between power and non-power signals in electronic devices, particularly in complex package structures like wafer level packaging and 2.5D/3D IC, leads to power loss and unwanted coupling effects.

Innovation Solution

The electronic device design includes power paths outside of the electronic components, allowing for reduced interference between power and non-power signals. This is achieved by positioning the power paths outside of the components and using a monolithic module integration with a flat surface, which increases production rate and manufacturing yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If power paths are provided inside the electronic components in conventional package structures, then the package size can be reduced, but interference between power signals and non-power signals occurs leading to power loss and unwanted coupling effects

Engineering Contradiction:
Improvepackage sizeVSAvoidpower loss
Core Design Contradiction:
Volume of moving objectVSLoss of energy

Solution Approach 1:

The patent transitions power paths from a two-dimensional planar arrangement inside components to a three-dimensional arrangement outside components, utilizing the vertical dimension and external space to route power signals, thereby avoiding interference while maintaining compact packaging

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent extracts power paths from the internal structure of electronic components and relocates them to external positions, separating power signal routing from non-power signal routing to eliminate coupling effects and power loss

Inventive Principle:
Principle #2Taking out (Extraction)

2Loss of energy

If power paths are routed outside the electronic components, then interference between power and non-power signals is reduced, but the package size increases

Engineering Contradiction:
Improvepower lossVSAvoidpackage size
Core Design Contradiction:
Loss of energyVSVolume of moving object

Solution Approach 1:

The patent employs nested module structures where multiple electronic components and their associated power paths are integrated into compact monolithic modules, allowing external power routing without proportionally increasing overall package volume

Inventive Principle:
Principle #7Nested doll (Nesting)

3Productivity

If complex package structures like wafer level packaging and 2.5D/3D IC are used, then integration density is increased, but the interference problem between power and non-power signals becomes more complex

Engineering Contradiction:
Improveintegration densityVSAvoidinterference complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the package into multiple monolithic modules, each with its own integrated power paths, allowing independent optimization of power routing in each module and simplifying interference management compared to complex interconnected structures

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20250167092A1Electronic device
Publication Date: 2025.05.22 ADVANCED SEMICON ENG INC
  • US20250167092A1 patent drawing
  • US20250167092A1 patent drawing
  • US20250167092A1 patent drawing

AI summary

An electronic device is disclosed. The electronic device includes a first module having a first electronic component, a second module at least partially overlapped with the first module and having an encapsulant, and a first power path penetrating through the encapsulant and providing a first power signal to a backside surface of the first electronic component.