Backside Power Rail Heat Dissipation for Dense Semiconductor Dies

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Solution Overview

Problem

As semiconductor devices continue to increase integration density through reduced minimum feature sizes, heat dissipation becomes a significant challenge that affects device performance and reliability.

Innovation Solution

Implementing high thermal conductivity materials, such as AlN, BN, Y2O2, Y3Al5O12, Al2O2, SiC, graphene, and diamond-like-carbon, as heat dissipation layers on a support substrate, combined with backside power structures, to enhance heat spreading and improve junction to ambient thermal resistance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but heat dissipation becomes more difficult and thermal resistance increases

Engineering Contradiction:
Improveintegration densityVSAvoidheat dissipation
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent introduces a third dimension by forming heat dissipation protrusions that extend vertically from the substrate surface. These protrusions create additional thermal pathways in the vertical dimension, allowing heat to dissipate upward away from the high-density circuit components while maintaining the high integration density on the substrate plane.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent changes the physical parameters of the substrate by forming protrusions with specific geometric parameters (height, width, spacing) and applying coatings with specific thermal conductivity parameters. This modifies the thermal field distribution and creates optimized heat dissipation pathways without changing the circuit layout.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If more heat dissipation structures are added to improve thermal resistance, then heat dissipation performance improves, but device complexity increases

Engineering Contradiction:
Improvethermal resistanceVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The heat dissipation function is segmented into multiple discrete protrusions distributed across the substrate surface. Each protrusion acts as an independent heat dissipation element, allowing the thermal management function to be divided into multiple parallel pathways rather than requiring a single complex heat sink structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The array of heat dissipation protrusions creates a porous-like structure on the substrate surface. This porous configuration increases the surface area available for heat dissipation and creates multiple thermal pathways while maintaining structural simplicity and ease of fabrication.

Inventive Principle:
Principle #31Porous materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances heat dissipation in integrated circuit dies, improving chip performance and reliability by up to 1.33°C/W, thereby addressing the heat dissipation challenges in high-density semiconductor devices.

Implementation Method 1

one or more heat dissipation layers may be formed on the support substrate. The heat dissipation layers may be made of a high thermal conductivity material

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20250343089A1Heat dissipation in semiconductor devices
Publication Date: 2025.11.06 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250343089A1 patent drawing
  • US20250343089A1 patent drawing
  • US20250343089A1 patent drawing

AI summary

A device includes a device layer comprising a first transistor; a first interconnect structure on a front-side of the device layer; and a second interconnect structure on a backside of the device layer. The second interconnect structure includes a power rail. The device further includes a carrier substrate bonded to the first interconnect structure and a first heat dissipation layer contacting the carrier substrate.