Backside Power Rail Layout for GAA FET Failure Analysis
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Solution Overview
Problem
The integration of backside power rails in semiconductor devices interferes with signal detection during failure analysis, as they absorb signals from the active regions, making it difficult to accurately identify defects in gate-all-around field-effect-transistors (GAA FETs).
Innovation Solution
The backside power rails are patterned to avoid overlapping with the active regions of GAA FETs, allowing signals from these regions to be detected without interference, enabling accurate failure analysis using testers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If backside power rails are integrated into semiconductor devices, then production efficiency is improved and costs are lowered, but signal detection accuracy deteriorates due to signal absorption
Solution Approach 1:
The backside metal layer is segmented into multiple conductive regions with different functions: power rail regions for power delivery and open regions for signal detection. This segmentation allows the same metal layer to serve dual purposes without interference between power distribution and failure analysis functions.
Solution Approach 2:
Different regions of the backside metal layer are assigned different electrical properties: highly conductive regions for power rails and less conductive or patterned regions for signal detection areas. This local differentiation enables the metal layer to provide power where needed while allowing signal passage where detection is required.
2Power
If backside power rails are positioned to deliver power efficiently, then power delivery performance is improved, but defect detection capability deteriorates due to signal absorption
Solution Approach 1:
The backside metal layer is divided into power rail segments and detection-friendly segments, allowing power to be delivered efficiently through dedicated conductive paths while other areas remain open for signal detection during failure analysis.
Solution Approach 2:
The backside metal layer acts as an intermediary structure that simultaneously supports power distribution and signal detection functions through its segmented design, eliminating the need for separate power delivery and detection mechanisms.
3Quantity of substance
If standard cell methodologies are used to integrate more devices, then chip density is improved, but failure analysis difficulty increases due to signal absorption by backside metals
Solution Approach 1:
The backside metal layer is segmented to create detection-friendly zones that do not absorb signals, enabling failure analysis of high-density standard cell architectures without the interference that would otherwise prevent defect detection in densely integrated circuits.
Data Source
AI summary
A semiconductor device and a method of manufacturing the device are disclosed. In one aspect, the semiconductor device includes a first active region that extends along a first lateral direction and includes a plurality of first epitaxial structures. The semiconductor device also includes an interconnect structure that also extends along the first lateral direction and is disposed below the first active region, wherein at least one of the plurality of first epitaxial structures is electrically coupled to the interconnect structure. The interconnect structure includes at least a first portion that offsets from the first active region along a second lateral direction perpendicular to the first lateral direction.