Backside Power Rail Seal Ring for Layout Simplicity and Protection

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

The complexity of semiconductor manufacturing is increased by the scaling down process, which results in high power dissipation and challenges in back-end-of-line (BEOL) design, particularly in routing power through the front-side of the semiconductive substrate, lacking adequate protection for backside power delivery systems.

Innovation Solution

A back-side seal ring structure is introduced to protect the backside power delivery system, ensuring integrity and reliability by safeguarding against potential damages and enhancing performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If power is routed through the front-side of the substrate, then power delivery is achieved, but the layout complexity increases and protection is insufficient

Engineering Contradiction:

Improveprotection of power delivery systemVSAvoidlayout complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the conventional approach by routing power through the back-side of the substrate instead of the front-side. This inversion simplifies the layout by eliminating the need for complex front-side power routing while providing inherent protection to the power delivery system, as the back-side routing is more isolated from front-side circuitry

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent utilizes the third dimension (vertical routing through substrate thickness) by creating through-substrate vias that connect front-side pads to back-side power rails. This dimensional approach allows power delivery without occupying valuable front-side layout space, thereby reducing layout complexity while maintaining reliability

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

2Productivity

If geometry size is scaled down, then production efficiency increases, but power dissipation increases

Engineering Contradiction:

Improveproduction efficiencyVSAvoidpower dissipation

Core Design Contradiction:

ProductivityVSLoss of energy

Solution Approach 1:

The patent addresses power dissipation by utilizing the vertical dimension for power routing through through-substrate vias. This separates power delivery from signal routing in the lateral plane, allowing for optimized current paths that reduce resistive losses and improve power delivery efficiency in scaled-down devices

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

3Device complexity

If back-side power delivery is implemented, then layout is simplified, but protection against damages is insufficient

Engineering Contradiction:

Improvelayout simplicityVSAvoidprotection against damages

Core Design Contradiction:

Device complexityVSReliability

Solution Approach 1:

The patent implements preliminary protective actions by forming the back-side seal ring structure before final device assembly. This seal ring is pre-configured to protect the back-side power delivery infrastructure, including through-substrate vias and power rails, from potential damages during subsequent manufacturing and operation

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The seal ring structure acts as a beforehand cushioning mechanism, providing a protective barrier that absorbs or deflects potential damages to the back-side power delivery system. This protective structure is in place before the device undergoes stress during operation, ensuring reliability

Inventive Principle:

Principle #11Beforehand cushioning (Prior cushioning)

Data Source

PatentUS20250349755A1Semiconductor structure and manufacturing method thereof

Publication Date: 2025.11.13 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A method includes forming an interconnect structure over a front-side of a substrate; forming a power rail over a back-side of the substrate, wherein a footprint of the interconnect structure overlaps a footprint of the power rail on the substrate; forming a first seal ring structure over the back-side of the substrate, wherein from a top view, the first seal ring structure surrounds the power rail.