Backside Power Rail Layout for Low-Resistance IC Power Gating

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Solution Overview

Problem

The semiconductor integrated circuit (IC) industry faces challenges in reducing power consumption due to increased resistance, which affects the operating voltages and overall performance of analog and digital devices as they become smaller and more complex.

Innovation Solution

The implementation of a header circuit coupled with gated and ungated power circuits, utilizing multiple power rails and transistors to manage voltage supplies and reduce resistance, allowing for efficient power management by switching between different power states based on control signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If power gating is implemented to reduce power consumption, then power consumption is reduced, but circuit complexity increases due to additional gating structures

Engineering Contradiction:
Improvepower consumptionVSAvoidcircuit complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The power supply network is segmented into multiple independent power rails (first power rail, second power rail, third power rail) that can be independently controlled. This segmentation allows selective power gating to specific circuit regions or functions, reducing overall power consumption while minimizing the impact on circuit complexity by organizing gating controls in a structured manner.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management through control signals that can switch power rails between active and inactive states based on operational requirements. The header circuit and power gating circuits dynamically adjust power delivery to different parts of the IC, enabling power consumption optimization without permanent structural complexity.

Inventive Principle:
Principle #15Dynamics

2Power

If multiple power rails are used to reduce resistance and improve power delivery, then power delivery efficiency improves, but device complexity increases

Engineering Contradiction:
Improvepower delivery efficiencyVSAvoiddevice complexity
Core Design Contradiction:
PowerVSDevice complexity

Solution Approach 1:

Multiple power rails (first power rail, second power rail, third power rail) are merged into a unified power delivery architecture that shares common control mechanisms and routing structures. This merging approach reduces resistance and improves power delivery efficiency while controlling device complexity through shared infrastructure rather than completely independent systems.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The power rail system is designed with multi-functionality where the same power rail infrastructure serves multiple purposes: delivering power to different voltage domains, supporting both gated and ungated circuits, and providing both high-current and low-current operation modes. This universality reduces the need for separate dedicated structures for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11756952B2Integrated circuit and method of forming the same
Publication Date: 2023.09.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11756952B2 patent drawing
  • US11756952B2 patent drawing
  • US11756952B2 patent drawing

AI summary

An integrated circuit includes a gated circuit configured to operate on a first or second voltage, a header circuit, a first power rail and a second power rail on a back-side of a wafer, a third power rail on the back-side of the wafer, and a fourth power rail on a front-side of the wafer. The first and second power rail extend in a first direction, and are separated from each other in a second direction. The third power rail is between the first and second power rail in the second direction. The third power rail is configured to supply the second voltage to the gated circuit. The fourth power rail includes a first set of conductors extending in the second direction. Each of the first set of conductors is configured to supply a third voltage to the header circuit, and is separated from each other in the first direction.