Backside Power Network Random Cut Patterning
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Solution Overview
Problem
The increasing density of transistors in integrated circuits leads to design and fabrication issues such as lack of pin access and routing congestion, particularly due to traditional power distribution networks that occupy space and hinder the addition of more transistors.
Innovation Solution
Implementing a backside power distribution network with random cut patterning, which allows for flexible cut locations and increased routing pin access by using through-silicon vias and voltage sources, and employing UV or EUV lithography to create holes and extend them laterally for optimal pin access points.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If traditional power distribution networks are used with fixed cut locations, then routing is simplified, but pin access is limited and routing congestion occurs
Solution Approach 1:
The patent inverts the traditional approach by moving the power distribution network to the backside of the substrate and using random cut locations on the front side, rather than having fixed cut locations on the front side with power distribution above the circuits. This inversion enables improved pin access while maintaining routing simplicity
Solution Approach 2:
The patent transitions from a two-dimensional planar power distribution network on the front side to a three-dimensional configuration with through-silicon vias extending vertically through the substrate. This dimensional change allows power and ground connections to access circuits from the backside, eliminating routing congestion and improving pin access
2Quantity of substance
If more transistors are packed into smaller volume, then circuit density increases, but pin access and routing become congested
Solution Approach 1:
By implementing through-silicon vias that extend vertically through the substrate and placing the power distribution network on the backside, the patent creates additional dimensional space for pin access. This allows high transistor density on the front side without compromising pin access, as power and ground connections are established from the backside rather than competing for front-side routing resources
3Volume of moving object
If cell height is reduced to save space, then chip volume decreases, but voltage drop increases and signal routing is impacted
Solution Approach 1:
The patent inverts the traditional power distribution architecture by placing it on the backside of the substrate with through-silicon vias providing vertical connections. This inversion allows the front-side cell height to be minimized for space efficiency while the backside power distribution network maintains acceptable voltage drops through direct vertical access to power and ground rails
Solution Approach 2:
The through-silicon vias act as intermediaries that provide low-resistance vertical pathways between the front-side circuits and the backside power distribution network. These vias mediate the connection, ensuring that reduced cell height does not result in increased voltage drop by providing direct electrical access through the substrate
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces overall cell height while maintaining acceptable voltage drops and minimizing signal routing impacts, enabling more transistors to be added without compromising pin access, thus addressing the challenges of routing congestion and space constraints.
Implementation Method 1
employing UV or EUV lithography to create holes and extend them laterally for optimal pin access points
Data Source
AI summary
Methods and devices are described herein for random cut patterning. A first metal line and a second metal line are formed within a cell of a substrate and extend in a vertical direction. A third metal line and a fourth metal line are formed within the cell and are perpendicular to the first metal line and the second metal line, respectively. A first circular region at one end of the first metal line is formed using a first patterning technique and a second circular region at one end of the second metal line is formed using a second patterning technique. The first circular region is laterally extended using a second patterning technique to form the third metal line and the second circular region is laterally extended using the second patterning technique to form the fourth metal line.