Back-Side Power Delivery Network With Sacrificial Buried Rails
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Solution Overview
Problem
Conventional CMOS scaling faces limitations in device density and interconnect congestion, with nanoTSVs restricting power supply path resistivity and material choices for buried power rails due to thermal budget constraints.
Innovation Solution
Form deep trenches in a semiconductor layer, fill them with a sacrificial material, form a capping layer, and after processing active devices, bond the wafer face down to a carrier, replacing the sacrificial material with conductive material to create buried power rails, enabling a wider material choice and improved contact resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If nanoTSVs are used to connect buried power rails from the back side, then routing options are increased and interconnect congestion is reduced, but the resistivity of the power supply path increases
Solution Approach 1:
The power delivery network is segmented into multiple components: front-side power rails, back-side power rails, and vertical interconnects. This segmentation allows each component to be optimized independently, with the back-side rails providing low-resistivity power distribution while front-side rails handle local power delivery to devices.
Solution Approach 2:
The patent transitions from a conventional single-sided power delivery architecture to a three-dimensional dual-sided architecture. Power rails are implemented on both the front and back sides of the semiconductor substrate, with vertical vias connecting them, thereby adding a spatial dimension to power distribution and reducing current density and resistivity in any single plane.
2Ease of manufacture
If buried power rails are processed from the front side of the device wafer, then the power delivery network is established early in the process, but the material choice is limited to materials compatible with the thermal budget for front side processing
Solution Approach 1:
The back-side power rails are formed preliminarily on a separate carrier substrate before the final assembly. This preliminary formation allows the use of low-resistivity materials that would be incompatible with front-side processing thermal budgets, while still integrating them into the final device structure through wafer bonding and thinning operations.
Solution Approach 2:
A carrier substrate is introduced as an intermediary element that enables the formation of back-side power rails with materials incompatible with front-side processing. The carrier serves as a temporary platform that allows independent optimization of the power delivery network materials and processes, which are later integrated with the active device layer.
3Ease of operation
If small Through Silicon Via connections are used to contact buried power rails, then the back side power delivery network is connected to front side devices, but the contact resistance between the vias and power supply tracks is unsatisfactory
Solution Approach 1:
The back-side power rails serve multiple functions: they provide power distribution across the substrate, act as electrical contacts to front-side devices through vertical vias, and enable the use of low-resistivity materials that would be incompatible with conventional front-side processing. This multi-functionality reduces the need for separate contact structures and minimizes contact resistance.
Data Source
AI summary
A method of producing an IC chip is provided. In one aspect, deep trenches are formed in a semiconductor layer that forms the top layer of a device wafer, the trenches going through the complete thickness of the layer. The trenches are filled with a sacrificial material, that is etched back and covered with a capping layer, thereby forming sacrificial buried rails. After processing active devices on the front surface of the semiconductor layer, including connections to the sacrificial rails, the device wafer is bonded face down to a carrier wafer, and thinned from the back side, until the sacrificial rails are exposed. The sacrificial material and the capping layer are removed and replaced by a conductive material, thereby forming the actual buried power rails. A back side power delivery network supplies power through the buried rails to the active devices of the IC. Using a sacrificial material for the buried rails can enable a wider choice of materials for these buried rails.