Backside Power Via Layout for Frontside Power Gating Cells
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Solution Overview
Problem
As electronic devices are miniaturized and require high performance, the complexity of wiring structures in integrated circuit devices with small sizes leads to decreased operating speeds, necessitating improved integration and performance in field effect transistors.
Innovation Solution
The integrated circuit device incorporates a power gating cell with a sleep control transistor and a through via that penetrates the substrate, allowing for the application of a virtual power voltage to normal cells through a power wiring structure, enhancing integration and electrical performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If the size of field effect transistors is reduced to miniaturize electronic devices, then the area of integrated circuit is reduced, but the operating speed decreases due to wiring structure complexity
Solution Approach 1:
The patent introduces a through-via structure that penetrates the substrate to establish direct vertical electrical connections between power supply and field effect transistors. This three-dimensional wiring approach bypasses the limitations of planar wiring, reducing the number of wiring layers needed and simplifying the overall wiring structure while maintaining compact device area.
Solution Approach 2:
The power supply network is segmented into localized regions, with each field effect transistor receiving power through dedicated through-vias. This segmentation reduces the complexity of global wiring by creating modular, independent power delivery paths, thereby simplifying the wiring structure and improving signal integrity.
2Adaptability or versatility
If the degree of device integration is increased to provide high-capacity integrated circuit devices, then the functionality and capacity are improved, but the wiring structure complexity increases leading to decreased operating speed
Solution Approach 1:
By utilizing vertical through-vias that penetrate the substrate, the patent creates additional routing dimensions for power and signal connections. This enables high-density integration of multiple functional blocks without proportionally increasing wiring complexity, as connections can be made directly through the substrate rather than requiring extensive lateral routing across multiple metal layers.
Solution Approach 2:
The through-via structure acts as an intermediary element that directly connects power supply nodes to active devices, eliminating the need for complex intermediate wiring networks. This mediator approach simplifies the overall wiring architecture by providing direct pathways for electrical connections, thereby reducing wiring complexity while supporting high device integration.
3Adaptability or versatility
If through via is used to supply power from backside wiring structure to frontside cells, then routing flexibility is improved, but the substrate structure becomes more complex
Solution Approach 1:
The through-via structure adds a vertical dimension to the substrate, enabling power and signal routing from the backside to the frontside. This three-dimensional approach provides exceptional routing flexibility, allowing connections to be made at any location on the substrate surface without being constrained by planar routing limitations, thereby greatly enhancing design adaptability.
Data Source
AI summary
An integrated circuit device is provided. The integrated circuit device includes: a substrate with a first active area and a second active area spaced apart from each other in a first horizontal direction; a plurality of normal cells arranged on a first surface of the substrate; a power wiring structure arranged on a second surface of the substrate; and a power gating cell arranged on the first surface of the substrate. The power gating cell includes: a sleep control transistor arranged in the first active area; and a through via penetrating the second active area of the substrate. The power gating cell is configured to provide a virtual power voltage to the plurality of normal cells through a virtual power line based on a power voltage supplied from the power wiring structure through the through via and a power line.


