Back-Side Power Wiring Layout for Reduced IC Line Margins

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Solution Overview

Problem

Existing integrated circuit devices face challenges in design flexibility and electrical reliability due to congestion and complexity in the power delivery network.

Innovation Solution

The integrated circuit device incorporates a back-side power delivery network (BSPDN) with a fin-type active area, channel area, gate lines, and a unique pattern of first and second lower lines, including jog and island pattern lines, to reduce line congestion and improve signal transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If conventional power delivery network design is used, then device integration is achieved, but line congestion and complexity increase

Engineering Contradiction:
Improvepower delivery network complexityVSAvoidelectrical reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces a back-side power delivery network (BSPDN) that routes power and signal lines on the rear surface of the substrate, utilizing the third dimension (depth/layer) to separate front-side active circuits from back-side routing. This dimensional separation reduces line congestion on the front side and organizes the power delivery network more efficiently, thereby reducing complexity while maintaining or improving electrical reliability through better signal integrity.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The power delivery network is segmented into front-side and back-side components. The substrate is divided such that active circuit elements reside on the front surface while power delivery and signal routing are segmented to the back surface. This segmentation allows independent optimization of each side, reducing overall network complexity and improving electrical reliability by separating sensitive active circuits from high-current power lines.

Inventive Principle:
Principle #1Segmentation

2Adaptability or versatility

If more wiring lines are added to improve connectivity, then design freedom increases, but line congestion worsens

Engineering Contradiction:
Improvedesign freedomVSAvoidline congestion
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

By moving the power delivery network to the back side of the substrate, the patent creates additional routing space in the vertical dimension. This allows for more wiring lines and greater design freedom without increasing planar line congestion, as the back-side routing layer provides a separate domain for signal and power distribution that does not interfere with front-side circuit density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If traditional front-side power delivery is used, then manufacturing is simplified, but signal transmission quality deteriorates

Engineering Contradiction:
Improvemanufacturing process simplicityVSAvoidsignal transmission quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The back-side power delivery network utilizes the substrate's rear surface as a separate routing layer, improving signal transmission quality by isolating high-current power lines from sensitive signal paths. This spatial separation reduces electromagnetic interference and voltage drops, enhancing signal integrity while maintaining manufacturing feasibility through standard multi-layer PCB or semiconductor packaging techniques.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentEP4553897A1Integrated circuit device
Publication Date: 2025.05.14 SAMSUNG ELECTRONICS CO LTD
  • EP4553897A1 patent drawingFigure 1
  • EP4553897A1 patent drawingFigure 2
  • EP4553897A1 patent drawingFigure 3

AI summary

Provided is an integrated circuit device with reduced line margins. The integrated circuit device includes an active area on a substrate, a channel area in the active area, a gate line that extends around the channel area, a plurality of first upper lines that electrically connect the channel area and the gate line to each other, a plurality of first lower lines of a side of the substrate, and a second lower wiring line on a side of the plurality of first lower lines that is opposite the substrate. The plurality of first lower lines includes a jog pattern line and an island pattern line that is spaced apart from the jog pattern line, and the island pattern line is electrically connected to the second lower wiring line by a lower contact.