Backside Power Track Layout for Lower-Resistance Memory Word Lines
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Solution Overview
Problem
Existing memory devices are constrained by the need to have both supply voltages (VDD and VDDM) carried by metal tracks on the frontside, limiting routing flexibility and impacting performance due to increased capacitance coupling and resistance in word lines.
Innovation Solution
Relocate some metal tracks carrying supply and ground voltages from the frontside to the backside of the substrate, reducing the number of frontside metal tracks and allowing wider word lines with lower resistance and reduced capacitance coupling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal tracks carrying supply and ground voltages are placed on the frontside, then power delivery is ensured, but routing flexibility is limited and capacitance coupling increases
Solution Approach 1:
The patent relocates power delivery tracks from the frontside (first dimension) to the backside (second dimension) of the substrate. This dimensional transition enables the frontside to be dedicated to signal routing with greater flexibility, while the backside handles power delivery, thus resolving the contradiction between power delivery reliability and routing flexibility.
Solution Approach 2:
The patent segments the substrate into functional zones: the frontside is dedicated to signal routing (word lines, bit lines), while the backside handles power delivery (VDD, VDDM, ground tracks). This functional segmentation allows each side to optimize for its specific purpose, improving both routing flexibility and power delivery without interference.
2Reliability
If multiple metal tracks are placed on the frontside, then power delivery is ensured, but word line resistance increases and capacitance coupling increases
Solution Approach 1:
The patent extracts power delivery tracks from the frontside metallization and relocates them to the backside. This extraction removes the source of capacitance coupling and resistance that degraded word line performance, allowing the frontside word lines to operate with lower resistance and reduced interference while power delivery is maintained through the backside tracks.
3Adaptability or versatility
If the number of frontside metal tracks is reduced, then routing flexibility improves, but power delivery capability must be maintained
Solution Approach 1:
The patent compensates for the reduced number of frontside metal tracks by utilizing the backside substrate for power delivery. This dimensional relocation maintains power delivery capability while enabling greater routing flexibility on the frontside, as the backside can accommodate power tracks without interfering with frontside signal routing.
Data Source
AI summary
A memory device includes memory cells formed on a first side of a substrate and powered by a supply voltage; a third metallization layer formed on the first side and including third metal tracks, at least one of the third metal tracks configured to only carry a non-power signal instead of carrying the supply voltage; a fourth metallization layer formed on the first side and including fourth metal tracks, each configured only as a word line; a fifth metallization layer formed on a second side of the substrate and including fifth metal tracks, each configured to carry the supply voltage or a ground voltage; and a sixth metallization layer formed on the second side and including sixth metal tracks, each configured to carry the supply voltage or the ground voltage.