Backside Probe Pad Layout for TSV-Linked Semiconductor Testing
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Solution Overview
Problem
Semiconductor memory devices with small planar pads are difficult to probe during operation tests, and providing evaluating probe pads on the wiring layer prohibits transistor and wiring arrangement, increasing chip area and complicating layout.
Innovation Solution
The solution involves placing evaluating probe pads on the back surface of the semiconductor substrate, allowing for larger pads suitable for probing without interfering with front surface circuits, and using TSVs to connect these pads to the front side pads, enabling efficient testing without increasing chip area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If evaluating probe pads are provided on the front surface wiring layer, then probing during operation tests becomes possible, but transistor and wiring arrangement are prohibited at overlapping positions, increasing chip area and complicating layout
Solution Approach 1:
The patent moves the evaluating probe pads from the front surface wiring layer to the back surface of the semiconductor substrate. This dimensional relocation allows probing access without interfering with front surface circuit layout, eliminating the need to prohibit transistor and wiring arrangement at pad positions.
2Ease of operation
If evaluating probe pads are provided on the front surface wiring layer, then probing during operation tests becomes possible, but chip area increases due to restricted transistor and wiring arrangement
Solution Approach 1:
By relocating probe pads to the back surface, the patent eliminates the need for large reserved areas on the front surface, thereby reducing overall chip area while maintaining full probing capability.
3Area of moving object
If small planar pads are used on the front surface, then chip area is reduced, but probing during operation tests becomes difficult
Solution Approach 1:
The patent provides large-area probe pads on the back surface that are suitable for probing, while keeping the front surface pads small for area efficiency. The back surface location provides adequate space for probing operations without compromising chip compactness.
Solution Approach 2:
TSVs (through-silicon vias) serve as intermediaries to electrically connect the back surface evaluating probe pads to the front surface circuit nodes, enabling probing access without direct front surface pad intervention.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach allows for easy and effective probing during operation tests, reducing chip area and simplifying layout by avoiding interference with front surface circuits, while enabling efficient power supply and signal transmission.
Implementation Method 1
One of end portions of the TSV exposed on a front surface of the semiconductor substrate on which a circuit is formed is coupled to a front side pad formed on a surface of a wiring layer. The other end portion of the TSV exposed on a back surface of the semiconductor substrate is coupled to a back side pad formed on a back surface of the semiconductor substrate.
Data Source
AI summary
An example apparatus includes a semiconductor substrate having a front surface on which an internal circuit is formed and a back surface opposite to the front surface, a first TSV penetrating the semiconductor substrate, and a first back side pad on the back surface of the semiconductor substrate and coupled to the first TSV The internal circuit includes an internal test node. The first back side pad is coupled to the internal test node of the internal circuit via the first TSV.