Backside Processed Semiconductor Device Cost Reduction
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Solution Overview
Problem
The high cost of thin film silicon-on-insulator (TF SOI) substrates limits their application in the semiconductor industry, particularly for manufacturing certain semiconductor devices like RF front-end devices and modules.
Innovation Solution
A method is developed to form semiconductor devices using a bulk silicon substrate, which involves forming shallow trench isolation, transistors, dielectric cap layers, and through silicon vias (TSV) without relying on expensive TF SOI substrates, by employing ion implantation, backside grinding, chemical mechanical polishing, and wet etching to thin the substrate and bond it with a carrier substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If thin film silicon-on-insulator (TF SOI) substrate is used to manufacture semiconductor devices, then device performance is improved, but manufacturing cost increases
Solution Approach 1:
The patent replaces expensive TF SOI substrates with conventional bulk silicon substrates that can be processed and discarded after a single use for manufacturing semiconductor devices. The bulk silicon substrate serves as a disposable carrier that is bonded to, processed, and then separated from the final device, eliminating the need for costly reusable TF SOI substrates while maintaining device performance
Solution Approach 2:
The patent introduces a carrier substrate as an intermediary element between the bulk silicon and the final semiconductor device. This carrier substrate enables the use of inexpensive bulk silicon by providing a temporary support structure that facilitates processing and can be removed after device fabrication, thus mediating between the low-cost bulk silicon and the high-performance device requirements
2Ease of manufacture
If bulk silicon substrate is used instead of TF SOI substrate, then manufacturing cost is reduced, but substrate thickness control and uniformity become more difficult
Solution Approach 1:
The patent performs preliminary thinning of the bulk silicon substrate to a target thickness before bonding it to the carrier substrate. This preliminary action includes mechanical grinding to remove excess material followed by chemical mechanical polishing (CMP) to achieve the precise thickness uniformity required, thereby preparing the substrate in advance for subsequent processing steps
Solution Approach 2:
The patent replaces purely mechanical thinning methods with a combination of mechanical grinding and chemical mechanical polishing (CMP). The CMP process uses a synergistic combination of mechanical abrasion and chemical etching to achieve superior thickness uniformity and surface flatness compared to mechanical methods alone, thereby substituting enhanced mechanical-chemical systems for simple mechanical systems
3Reliability
If shallow trench isolation is formed in bulk silicon substrate, then device isolation is achieved, but substrate thinning becomes more complex
Solution Approach 1:
The patent forms the shallow trench isolation structure in the bulk silicon substrate before performing the thinning operations. This preliminary formation of isolation structures provides mechanical support and defines etch stop layers that facilitate subsequent controlled thinning, thereby simplifying the overall thinning process despite the added isolation step
Solution Approach 2:
The patent segments the substrate thinning process into distinct stages: initial mechanical grinding to remove bulk material, followed by controlled etching to reach the shallow trench isolation, and finally chemical mechanical polishing to achieve final thickness uniformity. This segmentation of the thinning process into discrete steps makes the complex task of thinning through isolation structures manageable and controllable
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces manufacturing costs by utilizing conventional bulk silicon substrates, ensuring semiconductor device yield while achieving the desired thickness and uniformity, thus overcoming the cost limitations of TF SOI substrates.
Implementation Method 1
bonding the carrier substrate to the first substrate through the first dielectric cap layer
Implementation Method 2
performing ion implantation from the first surface of the first substrate to form a first injection doped layer
Implementation Method 3
performing backside grinding on the second surface of the first substrate
Implementation Method 4
performing chemical mechanical polishing (CMP) on the second surface of the first substrate
Implementation Method 5
performing wet etching on the second surface of the first substrate
Data Source
AI summary
A semiconductor device includes a first substrate having a first surface and a second surface opposite to the first surface, a shallow trench isolation in the first substrate, the shallow trench isolation having a first depth, the first depth being a distance from a bottom of the shallow trench isolation to the first surface of the first substrate, a transistor on the first surface of the first substrate, a first dielectric cap layer covering the first surface of the first substrate, a first interconnect structure on the first dielectric cap layer, a carrier substrate bonded to the first substrate through the first dielectric cap layer, a second dielectric cap layer on the second surface of the first substrate; and a through silicon via extending through the second dielectric cap layer, the shallow trench isolation, and the first dielectric cap layer, and connected to the first interconnect structure.