Backside RDL Warpage Control for TSV 3D IC Stacks

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Solution Overview

Problem

The mass reflow process for flip-chip attachment of large thin dies with through-silicon-vias (TSVs) in 3D IC stacks often results in warpage control issues, particularly on the backside of thinned TSV dies, which can prevent top die attachment due to non-flat surfaces required for micropillars interconnects, and this problem worsens with higher back-end-of-line (BEOL) layers.

Innovation Solution

A method and device that form a network of redistribution layer (RDL) lines on the backside of thinned TSV dies with under bump metal (UBM) structures to control warpage, using copper (Cu) RDL lines with high compressive stress and UBM capture pads, which are formed simultaneously to ensure a flat surface for top die attachment.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If mass reflow process is used for flip-chip attachment, then throughput is improved, but warpage control deteriorates

Engineering Contradiction:
ImprovethroughputVSAvoidwarpage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary action by forming RDL lines with high compressive stress on the backside of the TSV die before the flip-chip attachment process. This pre-applied compressive stress counteracts the tensile stress that develops during subsequent mass reflow processing, thereby maintaining warpage control while enabling high-volume throughput production

Inventive Principle:
Principle #10Preliminary action

2Adaptability or versatility

If number of BEOL layers is increased, then functionality is improved, but warpage severity increases

Engineering Contradiction:
ImprovefunctionalityVSAvoidwarpage severity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by concentrating the stress compensation function specifically on the backside of the TSV die through localized RDL line formation. This localized compressive stress structure addresses the warpage issue caused by multiple BEOL layers without requiring changes to the front-side functionality or interconnect architecture

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The RDL structure effectively controls warpage on the backside of TSV dies, ensuring a near-flat surface for top die attachment and reducing the need for additional process steps, enhancing the packaging of TSV dies in 3D IC stacks.

Implementation Method 1

forming the RDL lines with a high compressive stress

Methodology Applied
Scientific EffectCompressive stress: Compression

Data Source

PatentUS9553058B1Wafer backside redistribution layer warpage control
Publication Date: 2017.01.24 GLOBALFOUNDRIES US INC
  • US9553058B1 patent drawing
  • US9553058B1 patent drawing
  • US9553058B1 patent drawing

AI summary

A method of forming a network of RDL lines on the backside of a thinned TSV die to control warpage and the resulting device are provided. Embodiments include providing a thinned TSV die of a 3D IC stack, the thinned TSV die having a front side and a back side; forming a plurality of RDL lines across the backside of the die; and forming a plurality of UBM structures across the backside of the die.