Backside Redistribution Layer Structure for 3D IC Heat Dissipation
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Solution Overview
Problem
The scaling down of integrated circuits (ICs) has increased complexity in IC processing and manufacturing, with challenges in power dissipation, thermal management, limited circuit areas, and device performance, necessitating advancements in IC processing and manufacturing.
Innovation Solution
A 3D integrated circuit structure is formed by bonding two semiconductor wafers with circuit features, incorporating a conductive structure on the backside of one substrate for thermal dissipation and electrical connection, featuring through-substrate vias and backside redistribution layers to enhance thermal dissipation and electrical routing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If IC geometry size is decreased to increase functional density, then production efficiency and cost are improved, but processing complexity and manufacturing difficulty increase
Solution Approach 1:
The patent introduces backside processing operations on the semiconductor substrate, utilizing the third dimension (backside of the substrate) to perform via formation, metal deposition, and redistribution layer creation. This dimensional transition allows additional circuit elements to be added without increasing frontside complexity, thereby improving functional density while managing processing complexity through spatial separation of operations.
2Area of moving object
If IC geometry size is decreased to increase functional density, then circuit packing density is improved, but thermal management and power dissipation challenges worsen
Solution Approach 1:
The patent extracts thermal management functions from the conventional frontside architecture by implementing heat dissipation structures on the backside of the substrate. Through-silicon vias (TSVs) and backside redistribution layers serve dual purposes of electrical connection and thermal conduction, extracting heat away from densely packed frontside circuits to mitigate thermal management challenges.
3Adaptability or versatility
If backside metal features are added to enhance thermal dissipation and electrical routing, then design flexibility and circuit packing density are improved, but manufacturing process complexity increases
Solution Approach 1:
The patent merges electrical routing and thermal dissipation functions into unified backside structures. Through-silicon vias and backside metal layers simultaneously provide electrical connections for additional circuit functionality and serve as heat sinks for thermal management, thereby increasing design flexibility while consolidating manufacturing operations rather than adding separate processes.
Data Source
AI summary
A method includes forming first IC devices on a first frontside of a first semiconductor substrate and second IC devices on a second frontside of a second semiconductor substrate; forming a first contact pad over the first IC devices from the first frontside and a second contact pad over the second IC device from the second frontside; bonding the first and second contact pads such that the first and second IC devices are electrically connected; and forming a conductive structure on a first backside of the first semiconductor substrate. The conductive structure includes a through via (TV), a backside metal (BSM) feature, and a backside redistribution layer (BRDL). The TV is extending through the first semiconductor substrate and electrically connected the first and second IC devices to the BRDL, and the BSM feature is extended into a portion of the first semiconductor substrate and electrically connected to the TV.