Backside Voltage Regulator Die for ASIC Heat and Copper Losses
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Solution Overview
Problem
As the processing speed of ASIC dies increases, so does the power consumption, leading to increased heat within the ASIC package, which can cause component failure and reduced performance due to copper losses and solder electromigration.
Innovation Solution
The integration of an integrated voltage regulator die within the ASIC package, connected via through mold vias or through dielectric vias, provides power to the ASIC die through a backside power distribution network, reducing copper losses and heat generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If processing speed of ASIC dies is increased, then computational capability is improved, but power consumption increases leading to heat generation and component failure
Solution Approach 1:
The voltage regulator function is extracted from the traditional substrate-based power distribution and integrated directly onto the ASIC die through a dedicated voltage regulator die. This extraction allows for localized power regulation that reduces overall power consumption and heat generation in the package by eliminating unnecessary power delivery to non-active areas.
Solution Approach 2:
A voltage regulator die is introduced as an intermediary component between the power source and the ASIC die. This regulator die, connected through TMVs or TDVs, mediates the power delivery by regulating voltage and current, thereby reducing power losses and heat generation in the copper traces and solder joints.
2Productivity
If power consumption increases with processing speed, then computational performance is improved, but copper losses and solder electromigration increase causing component failure
Solution Approach 1:
The voltage regulation function is extracted and implemented as a separate integrated die, allowing for optimized power delivery that minimizes copper losses and solder electromigration effects by providing precisely regulated power at the point of consumption.
Solution Approach 2:
The voltage regulator die changes the electrical parameters (voltage and current) of the power delivery to match the actual consumption requirements of the ASIC die. This parameter optimization reduces excessive current flow, thereby minimizing copper losses and solder electromigration that lead to component failure.
3Ease of manufacture
If traditional substrate-based power distribution is used, then ease of manufacture is maintained, but copper losses and heat generation reduce performance
Solution Approach 1:
The voltage regulator die is merged with the ASIC die structure by positioning it adjacent to the ASIC die and connecting through TMVs or TDVs. This merging creates a compact integrated power delivery system that reduces copper trace lengths and associated losses while maintaining manufacturability through established semiconductor packaging processes.
Solution Approach 2:
The power distribution architecture transitions from a planar substrate-based approach to a three-dimensional integrated structure using through-mold vias or through-dielectric vias. This dimensional change allows vertical power delivery that reduces copper losses by eliminating long horizontal trace paths while maintaining ease of manufacture through standardized via technologies.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution effectively limits and regulates the power drawn by the ASIC package, reducing copper losses and heat, thereby preventing component failure and improving thermal and processing performance.
Implementation Method 1
the TSVs and redistribution layer form an inductor
Implementation Method 2
each of the one or more TMVs are connected to the packaging substrate on a first end by a flip chip bump and to the integrated voltage regulator die at a second opposite end
Implementation Method 3
reducing copper losses and heat, thereby preventing component failure
Data Source
AI summary
The technology relates to an integrated circuit (IC) package. The IC package may include a packaging substrate, an IC die, and an integrated voltage regulator die. The IC die may include a metal layer and a silicon layer. The metal layer may be connected to the packaging substrate. The integrated voltage regulator die may be positioned adjacent to the silicon layer and connected to the packaging substrate via one or more through mold vias or through dielectric vias. The IC die may be an application specific integrated circuit (ASIC) die.