Backside Sensing BioFET Reducing Parasitic Capacitance
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Solution Overview
Problem
Current BioFETs face challenges in sensitivity and integration due to compatibility issues between semiconductor fabrication processes and biological applications, particularly with high-aspect ratio etching and parasitic capacitances associated with multi-layer interconnects, which limit device density and sensitivity.
Innovation Solution
The development of a backside sensing BioFET with a dopant concentration gradient in the active region and surface treatments, such as annealing in oxygen or hydrogen environments, to enhance electrical property tuning and reduce parasitic capacitances, allowing for higher sensitivity and improved integration without the need for high-energy plasma etching.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional BioFET fabrication processes are used, then device integration is achieved, but sensitivity is limited due to parasitic capacitances from multi-layer interconnects
Solution Approach 1:
The patent implements backside sensing that penetrates through the substrate, transitioning from planar front-side sensing to three-dimensional through-substrate sensing. This dimensional change allows the sensing structure to access the channel region from the opposite side, bypassing the parasitic capacitance issues associated with front-side multi-layer interconnects while maintaining device integration.
Solution Approach 2:
The patent inverts the conventional sensing approach by placing the sensing structure on the backside of the substrate rather than the front side. This inversion allows the sensing electrode to directly access the channel region through the substrate, eliminating the need for complex front-side interconnect layers and reducing parasitic capacitances that limit sensitivity.
2Measurement precision
If high-aspect ratio etching is used to create sensing structures, then sensing capability is improved, but device integrity is compromised due to process complexity
Solution Approach 1:
Instead of etching high-aspect ratio structures from the front side, the patent inverts the approach by creating openings from the backside of the substrate. This inversion allows for shallower etching depths that maintain device integrity while achieving the same sensing capability, as the etching path is optimized from the opposite side where structural constraints are different.
Solution Approach 2:
The patent transitions from front-side vertical etching to backside through-substrate sensing, changing the dimensional approach to create sensing structures. This dimensional change allows for more favorable etching geometries that reduce aspect ratios while maintaining sensing effectiveness, thereby preserving device integrity.
3Measurement precision
If dopant concentration is increased to improve detection, then sensitivity increases, but device noise increases
Solution Approach 1:
The patent implements a dopant concentration gradient in the channel region, where dopant concentration varies spatially rather than being uniform. This local quality variation allows high dopant concentration near the sensing interface to enhance sensitivity, while lower dopant concentration in other regions maintains low noise performance, resolving the trade-off between sensitivity and noise.
Solution Approach 2:
The patent changes the dopant concentration parameter from a fixed value to a graded distribution. By implementing a dopant concentration gradient, the system optimizes detection sensitivity at the sensing interface while controlling noise generation in the bulk channel region, achieving both high sensitivity and low noise simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the sensitivity of BioFETs by tuning the drain current for gate voltage and reduces device noise, enabling more efficient detection of biomolecules while maintaining device integrity and integration capabilities.
Implementation Method 1
a dopant concentration gradient in the active region
Implementation Method 2
surface treatments, such as annealing in oxygen or hydrogen environments
Data Source
AI summary
The present disclosure provides a bio-field effect transistor (BioFET) and a method of fabricating a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a substrate, a transistor structure having a treated layer adjacent to the channel region, an isolation layer, and a dielectric layer in an opening of the isolation layer on the treated layer. The dielectric layer and the treated layer are disposed on opposite side of the transistor from a gate structure. The treated layer may be a lightly doped channel layer or a depleted layer.