Backside Separation Structure for Scaled MOSFET Isolation
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Solution Overview
Problem
The scale-down of metal-oxide-semiconductor field effect transistors (MOSFETs) in semiconductor devices leads to degraded characteristics, necessitating improvements in productivity and reliability.
Innovation Solution
A semiconductor device design incorporating a substrate with source/drain patterns, channel patterns, gate electrodes, and backside separation structures that enhance electrical isolation and connectivity, including upper and backside separation structures extending in specific directions to improve device performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If MOSFETs are scaled down to increase integration density, then device size is reduced, but device characteristics are degraded
Solution Approach 1:
The channel pattern is divided into multiple semiconductor patterns (e.g., nanosheets) stacked in the third direction, creating a segmented channel structure. This segmentation allows the device to maintain electrical performance while reducing the planar footprint, as the vertical stacking enables higher integration density without degrading device characteristics
Solution Approach 2:
The invention transitions from a two-dimensional channel structure to a three-dimensional stacked configuration. Multiple semiconductor patterns are arranged vertically in the third direction, utilizing the vertical dimension to increase effective channel area while maintaining a compact planar footprint, thereby improving integration density without sacrificing device performance
2Reliability
If separation structures are added to improve electrical isolation, then reliability is improved, but device complexity increases
Solution Approach 1:
The backside separation structures serve multiple functions: they provide electrical isolation between adjacent devices, act as etch stop layers during fabrication, and define the bottom surface of the semiconductor device. This multi-functionality reduces the need for additional separate structures, thereby improving electrical isolation without proportionally increasing device complexity
Solution Approach 2:
The backside separation structures are positioned at the substrate level, serving as intermediary elements that isolate adjacent devices at the foundation level. This approach provides effective electrical isolation without requiring complex isolation structures throughout the entire device stack, simplifying the overall device architecture
Data Source
AI summary
A semiconductor device includes: a substrate; source/drain patterns on the substrate; a channel pattern between the source/drain patterns, the channel pattern including a plurality of semiconductor patterns; a gate electrode between the plurality of semiconductor patterns; an upper separation structure extending in a first direction and spaced apart from the gate electrode in a second direction intersecting the first direction; a first backside separation structure penetrating the substrate below the gate electrode in a third direction intersecting the first direction and the second direction; and a second backside separation structure penetrating the substrate and overlapping the upper separation structure in the third direction.