Backside Shunt Contacts for Compact IC Layouts
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Solution Overview
Problem
The challenge of reducing the size of memory and logic cells in integrated circuits is hindered by conductive coupling between transistor structures using metal layers, leading to congestion and increased device footprint, limiting layout scaling and interconnect routing.
Innovation Solution
Implementing conductive backside structures as shunt contacts between transistors, such as between the source or drain region of one transistor and the gate of another, to free up space on the front-side interconnect levels and enable more compact circuit layouts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal layers are used for conductive coupling between transistor structures, then electrical connection is achieved, but congestion among metal interconnects increases and device footprint expands
Solution Approach 1:
The patent applies dimensionality change by moving the conductive coupling from the horizontal plane (metal interconnect layers) to the vertical dimension (backside contacts through the substrate). This allows electrical connections to be made from the back surface of the device, freeing up the front-side metal interconnect layers from routing these connections, thereby reducing congestion and overall device footprint.
Solution Approach 2:
The patent inverts the conventional approach by making contacts from the backside of the substrate rather than from the front side. Instead of routing all conductive connections through the metal layers on the front surface, the connection is established by forming a contact through the substrate from the back surface to the active region, effectively reversing the direction of the connection path.
2Reliability
If metal layers are used for conductive coupling between transistor structures, then electrical connection is achieved, but congestion among metal interconnects increases
Solution Approach 1:
The patent resolves metal interconnect congestion by transitioning the connection path from the two-dimensional metal interconnect plane to the third dimension through the substrate. This vertical backside contact approach removes the need for complex metal routing to achieve certain connections, thereby simplifying the metal interconnect architecture.
Solution Approach 2:
The patent extracts the function of conducting certain signals from the metal interconnect layer and relocates it to the substrate itself via backside contacts. By taking out this function from the metal interconnect system, the complexity and congestion of the metal layer are reduced.
Data Source
AI summary
Techniques are provided herein to form semiconductor devices having conductive backside structures to couple various transistor structures. In some embodiments, a given conductive backside structure acts as a shunt interconnect between two transistors, such as between the gate of one transistor and the source or drain region of another transistor. In an example, an integrated circuit includes two transistor devices having semiconductor material extending between separate source and drain regions and different gate structures over or around the semiconductor material of the two transistor devices. A conductive backside structure may be formed from the backside of the integrated circuit (e.g., after removing all or most of the substrate), where the backside structure contacts the source or drain region of one transistor and the gate structure of the other transistor.