Backside Source/Drain Silicide Contact for Lower Resistance
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Solution Overview
Problem
As IC devices miniaturize, the available area for forming contacts and interconnects decreases, leading to increased routing complexity and parasitic resistance and capacitance, which negatively impacts manufacturing cost and performance.
Innovation Solution
A semiconductor structure with a high-temperature silicide contact for backside source/drain contacts, featuring a lower S/D portion with a high-temperature silicide structure and an etch stop material, an upper S/D portion with epitaxial material, and a backside metal structure extending through the substrate to contact the silicide, reducing contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If IC devices are miniaturized to advance computing power, then computing power increases, but the available area for forming contacts and interconnects decreases
Solution Approach 1:
The patent transitions from planar contacts to three-dimensional vertically-stacked channels, enabling multiple contact points to be formed within a smaller footprint area. The vertically-stacked channels extend in the vertical dimension, allowing increased contact area and improved electrical connection without occupying more lateral space on the chip.
Solution Approach 2:
The source/drain structure is divided into multiple discrete vertically-stacked channels rather than a single continuous structure. This segmentation allows for better control of electrical properties, reduced parasitic effects, and more efficient use of the limited available area while maintaining high computing power.
2Length of moving object
If the sizes of IC devices and components become smaller, then miniaturization is achieved, but routing complexity increases
Solution Approach 1:
By moving from two-dimensional planar routing to three-dimensional vertically-stacked channels, the patent reduces the complexity of lateral routing while maintaining connectivity. The vertical stacking allows direct connections between components without requiring complex lateral routing paths.
3Length of moving object
If component sizes are reduced, then miniaturization is achieved, but parasitic resistance and capacitance increase
Solution Approach 1:
The source/drain structure is segmented into multiple vertically-stacked channels, which reduces the lateral dimensions of each individual contact region. This segmentation decreases the parasitic capacitance associated with larger planar contacts while maintaining low resistance through the vertical conduction path.
Solution Approach 2:
The patent replaces the conventional planar contact geometry with a vertically-stacked channel structure, fundamentally changing the electrical field distribution. This substitution reduces the parasitic capacitance by minimizing the overlapping area between conductive regions while maintaining effective electrical connection through the vertical channel path.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The high-temperature silicide contact reduces contact resistance, improving circuit performance and benefiting backside power distribution networks by increasing the contact area and lowering manufacturing costs.
Implementation Method 1
lower S/D portion comprising a high temperature silicide structure
Implementation Method 2
upper S/D portion comprising an epitaxial (EPI) material in contact with the high temperature silicide structure
Data Source
AI summary
A semiconductor structure having a high-temperature silicide contact for backside source/drain (S/D) contacts and method for making the same is disclosed. In an aspect, the semiconductor structure comprises a substrate; a source/drain (S/D) structure comprising a lower S/D portion disposed above the substrate and an upper S/D portion disposed above the lower S/D portion, the lower S/D portion comprising a high temperature silicide structure and an etch stop material structure surrounding at least a portion of the high temperature silicide structure, the upper S/D portion comprising an epitaxial (EPI) material in contact with the high temperature silicide structure; and a backside metal structure that extends through the substrate and is in contact with the high temperature silicide structure.