Backside Super Via Structure for IC Routing and Heat Conduction

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Solution Overview

Problem

As integrated circuit (IC) semiconductor devices continue to miniaturize, the increased density of microdevices leads to higher power requirements, necessitating more efficient heat removal and advanced wiring and routing solutions to manage power and signal distribution effectively.

Innovation Solution

The implementation of a super via structure within the backside BEOL level, which includes a lower and upper skip via with liners and a M3 level wire, enables efficient power delivery, signal routing, and thermal conductivity, allowing for concentrated heat removal and improved wiring efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Use of energy by moving object

If through substrate vias (TSVs) are used to supply power through backside, then power distribution efficiency is improved, but device complexity increases

Engineering Contradiction:
Improvepower distribution efficiencyVSAvoiddevice complexity
Core Design Contradiction:
Use of energy by moving objectVSDevice complexity

Solution Approach 1:

The backside BEOL level is segmented into multiple wiring layers (V1, V2, V3, V4, V5) with dedicated via structures (lower skip via, upper skip via) for power distribution. This segmentation allows efficient power delivery through the substrate backside while organizing the complexity into manageable functional layers, each handling specific routing tasks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Power distribution is implemented through the third dimension by creating vertical via structures that penetrate through the substrate backside. The lower skip via and upper skip via extend through multiple wiring layers, enabling power to be delivered from the backside interface upward through the BEOL stack, thus utilizing vertical space to improve distribution efficiency without increasing planar footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If miniaturization is pursued to increase microdevice density, then productivity is improved, but heat removal becomes more difficult

Engineering Contradiction:
Improvemicrodevice densityVSAvoidheat removal
Core Design Contradiction:
ProductivityVSTemperature

Solution Approach 1:

The lower liner and upper liner act as intermediary thermal pathways between the dense microdevices and the backside interface. These liner structures, positioned within the skip vias, provide dedicated thermal conduction paths that mediate heat transfer from the high-density device region through the BEOL layers to the external heat sink at the backside, enabling effective heat removal despite increased device density.

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces the maximum semiconductor IC device temperature by more than one degree Celsius, enhancing performance and reliability by providing effective power distribution, signal transmission, and thermal management.

Implementation Method 1

The backside BEOL level includes a super via... The super via includes a lower skip via, an upper skip via, a lower liner around sidewall(s) of the lower skip via, and an upper liner around sidewall(s) of the upper skip via... This solution reduces the maximum semiconductor IC device temperature by more than one degree Celsius... providing effective power distribution, signal transmission, and thermal management

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS20240290688A1Super via within backside level
Publication Date: 2024.08.29 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US20240290688A1 patent drawing
  • US20240290688A1 patent drawing
  • US20240290688A1 patent drawing

AI summary

A semiconductor IC device includes a super via. The super via includes a lower skip via and an upper skip via. A connecting wire may be directly between or may separate the lower skip via and the upper skip via. The upper skip via may be adequately electrically isolated from a surrounding wire by an upper liner. The lower skip via may be adequately electrically isolated from a surrounding wire by a lower liner. The super via along with the connecting wire may connect a wire in the lowest wiring level with a wire in the highest wiring level. Because of the lower liner and/or the upper liner, the super via may be utilized for wiring and routing through a backside level of the semiconductor IC device (e.g., potential or signal routing) and be utilized as a heat transfer conduit through the backside of the semiconductor IC device.