Backside Power Switch Integration for Front-Side Routing Relief
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Solution Overview
Problem
Existing integrated circuit (IC) packages face challenges with power switches (PWS) being on the front side, which consumes chip area and limits routing resources, leading to inefficiencies in power delivery and increased electromagnetic interference.
Innovation Solution
The implementation of power switches and power delivery networks on the backside of semiconductor dies, decoupling them from front-side logic circuitry, allowing for independent fabrication and optimization of power delivery components, thereby freeing up front-side area for logic and signal circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If power switches are placed on the front side of the semiconductor die, then power delivery can be achieved, but chip area is consumed and routing resources are limited
Solution Approach 1:
The patent moves the power delivery network from the front side (two-dimensional plane) to the back side of the semiconductor die, utilizing the third dimension (depth/thickness) of the device structure. This dimensional transition allows power switches and routing to occupy the back side area, freeing up front side chip area for logic circuitry while maintaining effective power delivery capability.
2Power
If power switches are placed on the front side of the semiconductor die, then power delivery can be achieved, but routing resources are limited
Solution Approach 1:
By relocating the power delivery network to the back side of the die, the patent creates additional spatial freedom for routing. The back side provides independent routing layers and paths that do not compete with front side logic circuitry, thereby increasing available routing resources and reducing overall device complexity.
3Power
If power switches are placed on the front side of the semiconductor die, then power delivery can be achieved, but electromagnetic interference increases
Solution Approach 1:
The patent segments the semiconductor die into functionally separate regions: the front side houses logic circuitry while the back side houses the power delivery network. This spatial segmentation isolates high-current power switching operations from sensitive logic circuits, reducing electromagnetic interference and noise coupling between these functional blocks.
4Power
If front side area is used for power switches, then power delivery is achieved, but area for logic and signal circuitry is reduced
Solution Approach 1:
The patent utilizes the back side of the semiconductor die as an additional functional layer, effectively doubling the available space for different circuit types. This dimensional approach allows maximum front side area allocation to logic and signal circuitry while accommodating the power delivery network on the back side, thereby maximizing overall device productivity and performance.
Data Source
AI summary
Semiconductor dies having backside power switch components and related methods are disclosed herein. An example semiconductor die includes a semiconductor substrate defining a front side and a backside. A signal network is provided on the front side. The signal network includes a plurality of first transistors. A power delivery network is provided on the backside. The power delivery network includes a power switch provided on the backside. The power switch includes a plurality of second transistors. The power switch is to cause operation of the first transistors to switch between a first operating state and a second operating state.