Backside-Terminal Vertical Transducers for Wirebond-Free Packaging

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Solution Overview

Problem

Conventional vertical solid-state transducers face issues with delamination due to thermal expansion coefficient mismatch, require intricate wirebond connections, and have complex manufacturing processes that increase costs and time.

Innovation Solution

The development of vertical solid-state transducers with backside terminals that allow for wirebond-free packaging, improved thermal management, and efficient current spreading through buried contacts and carrier substrates, enabling wafer-level packaging and reduced manufacturing complexity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wirebond connections are used for electrical access, then electrical connectivity is achieved, but device complexity and manufacturing intricacy increase

Engineering Contradiction:
Improveelectrical connectivityVSAvoidconnection intricacy
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the wirebond connection requirement by providing direct electrical access to both contacts through backside terminals. This eliminates the need for separate wirebond connections, reducing device complexity while maintaining electrical connectivity. The backside terminals expose the contacts directly, allowing for simpler bonding or soldering processes.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of accessing contacts from the front side where wirebonds are traditionally applied, the patent inverts the approach by providing electrical access from the backside of the device. This inversion allows direct contact with the electrical contacts without requiring intricate wirebond routing over the device surface.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If conventional packaging processes are used, then device assembly is completed, but manufacturing time and cost increase

Engineering Contradiction:
Improvepackaging completenessVSAvoidmanufacturing efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent performs preliminary action by providing backside terminals that expose electrical contacts before final packaging is complete. This allows electrical connections to be established earlier in the manufacturing process, enabling parallel processing steps and reducing overall manufacturing time and complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent merges the electrical connection process with the packaging process by integrating backside terminals into the device structure. This combination eliminates separate wiring steps and allows connections to be made during standard packaging operations, improving manufacturing efficiency.

Inventive Principle:
Principle #5Merging (Combining)

3Temperature

If thermal management is improved, then heat dissipation increases, but device structure complexity increases

Engineering Contradiction:
Improveheat dissipationVSAvoidstructural complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The backside terminals serve multiple functions: they provide electrical access to contacts and simultaneously act as thermal management pathways. This multi-functionality allows heat dissipation to be achieved through the existing terminal structure without adding separate thermal management components, avoiding increased structural complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances packaging reliability, efficiency, and thermal performance while reducing manufacturing time and cost by providing electrical access from the backside, facilitating applications with tight die spacing and enabling wafer-level packaging.

Implementation Method 1

improved thermal management

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

buried contacts and carrier substrates, enabling wafer-level packaging

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12490564B2Vertical solid-state transducers having backside terminals and associated systems and methods
Publication Date: 2025.12.02 MICRON TECHNOLOGY INC
  • US12490564B2 patent drawing
  • US12490564B2 patent drawing
  • US12490564B2 patent drawing

AI summary

Vertical solid-state transducers (“SSTs”) having backside contacts are disclosed herein. An SST in accordance with a particular embodiment can include a transducer structure having a first semiconductor material at a first side of the SST, a second semiconductor material at a second side of the SST opposite the first side, and an active region between the first and second semiconductor materials. The SST can further include first and second contacts electrically coupled to the first and second semiconductor materials, respectively. A portion of the first contact can be covered by a dielectric material, and a portion can remain exposed through the dielectric material. A conductive carrier substrate can be disposed on the dielectric material. An isolating via can extend through the conductive carrier substrate to the dielectric material and surround the exposed portion of the first contact to define first and second terminals electrically accessible from the first side.